// SPDX-License-Identifier: GPL-2.0-only /* * ST SPEAr1310-miphy driver * * Copyright (C) 2014 ST Microelectronics * Pratyush Anand <[email protected]> * Mohit Kumar <[email protected]> */ #include <linux/bitops.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/regmap.h> /* SPEAr1310 Registers */ #define SPEAR1310_PCIE_SATA_CFG … #define SPEAR1310_PCIE_SATA2_SEL_PCIE … #define SPEAR1310_PCIE_SATA1_SEL_PCIE … #define SPEAR1310_PCIE_SATA0_SEL_PCIE … #define SPEAR1310_PCIE_SATA2_SEL_SATA … #define SPEAR1310_PCIE_SATA1_SEL_SATA … #define SPEAR1310_PCIE_SATA0_SEL_SATA … #define SPEAR1310_SATA2_CFG_TX_CLK_EN … #define SPEAR1310_SATA2_CFG_RX_CLK_EN … #define SPEAR1310_SATA2_CFG_POWERUP_RESET … #define SPEAR1310_SATA2_CFG_PM_CLK_EN … #define SPEAR1310_SATA1_CFG_TX_CLK_EN … #define SPEAR1310_SATA1_CFG_RX_CLK_EN … #define SPEAR1310_SATA1_CFG_POWERUP_RESET … #define SPEAR1310_SATA1_CFG_PM_CLK_EN … #define SPEAR1310_SATA0_CFG_TX_CLK_EN … #define SPEAR1310_SATA0_CFG_RX_CLK_EN … #define SPEAR1310_SATA0_CFG_POWERUP_RESET … #define SPEAR1310_SATA0_CFG_PM_CLK_EN … #define SPEAR1310_PCIE2_CFG_DEVICE_PRESENT … #define SPEAR1310_PCIE2_CFG_POWERUP_RESET … #define SPEAR1310_PCIE2_CFG_CORE_CLK_EN … #define SPEAR1310_PCIE2_CFG_AUX_CLK_EN … #define SPEAR1310_PCIE1_CFG_DEVICE_PRESENT … #define SPEAR1310_PCIE1_CFG_POWERUP_RESET … #define SPEAR1310_PCIE1_CFG_CORE_CLK_EN … #define SPEAR1310_PCIE1_CFG_AUX_CLK_EN … #define SPEAR1310_PCIE0_CFG_DEVICE_PRESENT … #define SPEAR1310_PCIE0_CFG_POWERUP_RESET … #define SPEAR1310_PCIE0_CFG_CORE_CLK_EN … #define SPEAR1310_PCIE0_CFG_AUX_CLK_EN … #define SPEAR1310_PCIE_CFG_MASK(x) … #define SPEAR1310_SATA_CFG_MASK(x) … #define SPEAR1310_PCIE_CFG_VAL(x) … #define SPEAR1310_SATA_CFG_VAL(x) … #define SPEAR1310_PCIE_MIPHY_CFG_1 … #define SPEAR1310_MIPHY_DUAL_OSC_BYPASS_EXT … #define SPEAR1310_MIPHY_DUAL_CLK_REF_DIV2 … #define SPEAR1310_MIPHY_DUAL_PLL_RATIO_TOP(x) … #define SPEAR1310_MIPHY_SINGLE_OSC_BYPASS_EXT … #define SPEAR1310_MIPHY_SINGLE_CLK_REF_DIV2 … #define SPEAR1310_MIPHY_SINGLE_PLL_RATIO_TOP(x) … #define SPEAR1310_PCIE_SATA_MIPHY_CFG_SATA_MASK … #define SPEAR1310_PCIE_SATA_MIPHY_CFG_PCIE_MASK … #define SPEAR1310_PCIE_SATA_MIPHY_CFG_SATA … #define SPEAR1310_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK … #define SPEAR1310_PCIE_SATA_MIPHY_CFG_PCIE … #define SPEAR1310_PCIE_MIPHY_CFG_2 … enum spear1310_miphy_mode { … }; struct spear1310_miphy_priv { … }; static int spear1310_miphy_pcie_init(struct spear1310_miphy_priv *priv) { … } static int spear1310_miphy_pcie_exit(struct spear1310_miphy_priv *priv) { … } static int spear1310_miphy_init(struct phy *phy) { … } static int spear1310_miphy_exit(struct phy *phy) { … } static const struct of_device_id spear1310_miphy_of_match[] = …; MODULE_DEVICE_TABLE(of, spear1310_miphy_of_match); static const struct phy_ops spear1310_miphy_ops = …; static struct phy *spear1310_miphy_xlate(struct device *dev, const struct of_phandle_args *args) { … } static int spear1310_miphy_probe(struct platform_device *pdev) { … } static struct platform_driver spear1310_miphy_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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