linux/drivers/gpu/drm/i915/gt/gen7_renderclear.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2019 Intel Corporation
 */

#include "gen7_renderclear.h"
#include "i915_drv.h"
#include "intel_gpu_commands.h"
#include "intel_gt_regs.h"

#define GT3_INLINE_DATA_DELAYS …
#define batch_advance(Y, CS) …

struct cb_kernel { … };

#define CB_KERNEL(name) …

#include "ivb_clear_kernel.c"
static const struct cb_kernel cb_kernel_ivb = …;

#include "hsw_clear_kernel.c"
static const struct cb_kernel cb_kernel_hsw = …;

struct batch_chunk { … };

struct batch_vals { … };

static int num_primitives(const struct batch_vals *bv)
{ … }

static void
batch_get_defaults(struct drm_i915_private *i915, struct batch_vals *bv)
{ … }

static void batch_init(struct batch_chunk *bc,
		       struct i915_vma *vma,
		       u32 *start, u32 offset, u32 max_bytes)
{ … }

static u32 batch_offset(const struct batch_chunk *bc, u32 *cs)
{ … }

static u32 batch_addr(const struct batch_chunk *bc)
{ … }

static void batch_add(struct batch_chunk *bc, const u32 d)
{ … }

static u32 *batch_alloc_items(struct batch_chunk *bc, u32 align, u32 items)
{ … }

static u32 *batch_alloc_bytes(struct batch_chunk *bc, u32 align, u32 bytes)
{ … }

static u32
gen7_fill_surface_state(struct batch_chunk *state,
			const u32 dst_offset,
			const struct batch_vals *bv)
{ … }

static u32
gen7_fill_binding_table(struct batch_chunk *state,
			const struct batch_vals *bv)
{ … }

static u32
gen7_fill_kernel_data(struct batch_chunk *state,
		      const u32 *data,
		      const u32 size)
{ … }

static u32
gen7_fill_interface_descriptor(struct batch_chunk *state,
			       const struct batch_vals *bv,
			       const struct cb_kernel *kernel,
			       unsigned int count)
{ … }

static void
gen7_emit_state_base_address(struct batch_chunk *batch,
			     u32 surface_state_base)
{ … }

static void
gen7_emit_vfe_state(struct batch_chunk *batch,
		    const struct batch_vals *bv,
		    u32 urb_size, u32 curbe_size,
		    u32 mode)
{ … }

static void
gen7_emit_interface_descriptor_load(struct batch_chunk *batch,
				    const u32 interface_descriptor,
				    unsigned int count)
{ … }

static void
gen7_emit_media_object(struct batch_chunk *batch,
		       unsigned int media_object_index)
{ … }

static void gen7_emit_pipeline_flush(struct batch_chunk *batch)
{ … }

static void gen7_emit_pipeline_invalidate(struct batch_chunk *batch)
{ … }

static void emit_batch(struct i915_vma * const vma,
		       u32 *start,
		       const struct batch_vals *bv)
{ … }

int gen7_setup_clear_gpr_bb(struct intel_engine_cs * const engine,
			    struct i915_vma * const vma)
{ … }