linux/drivers/gpu/drm/i915/gt/intel_gt_irq.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2019 Intel Corporation
 */

#include <linux/sched/clock.h>

#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_breadcrumbs.h"
#include "intel_gt.h"
#include "intel_gt_irq.h"
#include "intel_gt_print.h"
#include "intel_gt_regs.h"
#include "intel_uncore.h"
#include "intel_rps.h"
#include "pxp/intel_pxp_irq.h"
#include "uc/intel_gsc_proxy.h"

static void guc_irq_handler(struct intel_guc *guc, u16 iir)
{ … }

static u32
gen11_gt_engine_identity(struct intel_gt *gt,
			 const unsigned int bank, const unsigned int bit)
{ … }

static void
gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
			const u16 iir)
{ … }

static struct intel_gt *pick_gt(struct intel_gt *gt, u8 class, u8 instance)
{ … }

static void
gen11_gt_identity_handler(struct intel_gt *gt, const u32 identity)
{ … }

static void
gen11_gt_bank_handler(struct intel_gt *gt, const unsigned int bank)
{ … }

void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl)
{ … }

bool gen11_gt_reset_one_iir(struct intel_gt *gt,
			    const unsigned int bank, const unsigned int bit)
{ … }

void gen11_gt_irq_reset(struct intel_gt *gt)
{ … }

void gen11_gt_irq_postinstall(struct intel_gt *gt)
{ … }

void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
{ … }

static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
{ … }

void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
{ … }

void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl)
{ … }

void gen8_gt_irq_reset(struct intel_gt *gt)
{ … }

void gen8_gt_irq_postinstall(struct intel_gt *gt)
{ … }

static void gen5_gt_update_irq(struct intel_gt *gt,
			       u32 interrupt_mask,
			       u32 enabled_irq_mask)
{ … }

void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask)
{ … }

void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask)
{ … }

void gen5_gt_irq_reset(struct intel_gt *gt)
{ … }

void gen5_gt_irq_postinstall(struct intel_gt *gt)
{ … }