linux/drivers/gpu/drm/i915/gt/selftest_mocs.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2019 Intel Corporation
 */

#include "gt/intel_engine_pm.h"
#include "gt/intel_gpu_commands.h"
#include "i915_selftest.h"

#include "gem/selftests/igt_gem_utils.h"
#include "gem/selftests/mock_context.h"
#include "selftests/igt_reset.h"
#include "selftests/igt_spinner.h"
#include "selftests/intel_scheduler_helpers.h"

struct live_mocs { … };

static struct intel_context *mocs_context_create(struct intel_engine_cs *engine)
{ … }

static int request_add_sync(struct i915_request *rq, int err)
{ … }

static int request_add_spin(struct i915_request *rq, struct igt_spinner *spin)
{ … }

static int live_mocs_init(struct live_mocs *arg, struct intel_gt *gt)
{ … }

static void live_mocs_fini(struct live_mocs *arg)
{ … }

static int read_regs(struct i915_request *rq,
		     u32 addr, unsigned int count,
		     u32 *offset)
{ … }

static int read_mocs_table(struct i915_request *rq,
			   const struct drm_i915_mocs_table *table,
			   u32 *offset)
{ … }

static int read_l3cc_table(struct i915_request *rq,
			   const struct drm_i915_mocs_table *table,
			   u32 *offset)
{ … }

static int check_mocs_table(struct intel_engine_cs *engine,
			    const struct drm_i915_mocs_table *table,
			    u32 **vaddr)
{ … }

static bool mcr_range(struct drm_i915_private *i915, u32 offset)
{ … }

static int check_l3cc_table(struct intel_engine_cs *engine,
			    const struct drm_i915_mocs_table *table,
			    u32 **vaddr)
{ … }

static int check_mocs_engine(struct live_mocs *arg,
			     struct intel_context *ce)
{ … }

static int live_mocs_kernel(void *arg)
{ … }

static int live_mocs_clean(void *arg)
{ … }

static int active_engine_reset(struct intel_context *ce,
			       const char *reason,
			       bool using_guc)
{ … }

static int __live_mocs_reset(struct live_mocs *mocs,
			     struct intel_context *ce, bool using_guc)
{ … }

static int live_mocs_reset(void *arg)
{ … }

int intel_mocs_live_selftests(struct drm_i915_private *i915)
{ … }