linux/drivers/gpu/drm/i915/gt/intel_renderstate.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2014 Intel Corporation
 */

#include "gem/i915_gem_internal.h"

#include "i915_drv.h"
#include "intel_renderstate.h"
#include "intel_context.h"
#include "intel_gpu_commands.h"
#include "intel_ring.h"

static const struct intel_renderstate_rodata *
render_state_get_rodata(const struct intel_engine_cs *engine)
{ … }

/*
 * Macro to add commands to auxiliary batch.
 * This macro only checks for page overflow before inserting the commands,
 * this is sufficient as the null state generator makes the final batch
 * with two passes to build command and state separately. At this point
 * the size of both are known and it compacts them by relocating the state
 * right after the commands taking care of alignment so we should sufficient
 * space below them for adding new commands.
 */
#define OUT_BATCH …

static int render_state_setup(struct intel_renderstate *so,
			      struct drm_i915_private *i915)
{ … }

#undef OUT_BATCH

int intel_renderstate_init(struct intel_renderstate *so,
			   struct intel_context *ce)
{ … }

int intel_renderstate_emit(struct intel_renderstate *so,
			   struct i915_request *rq)
{ … }

void intel_renderstate_fini(struct intel_renderstate *so,
			    struct intel_context *ce)
{ … }