// SPDX-License-Identifier: MIT /* * Copyright © 2008-2018 Intel Corporation */ #include <linux/sched/mm.h> #include <linux/stop_machine.h> #include <linux/string_helpers.h> #include "display/intel_display_reset.h" #include "display/intel_overlay.h" #include "gem/i915_gem_context.h" #include "gt/intel_gt_regs.h" #include "gt/uc/intel_gsc_fw.h" #include "i915_drv.h" #include "i915_file_private.h" #include "i915_gpu_error.h" #include "i915_irq.h" #include "i915_reg.h" #include "intel_breadcrumbs.h" #include "intel_engine_pm.h" #include "intel_engine_regs.h" #include "intel_gt.h" #include "intel_gt_pm.h" #include "intel_gt_print.h" #include "intel_gt_requests.h" #include "intel_mchbar_regs.h" #include "intel_pci_config.h" #include "intel_reset.h" #include "uc/intel_guc.h" #define RESET_MAX_RETRIES … static void client_mark_guilty(struct i915_gem_context *ctx, bool banned) { … } static bool mark_guilty(struct i915_request *rq) { … } static void mark_innocent(struct i915_request *rq) { … } void __i915_request_reset(struct i915_request *rq, bool guilty) { … } static bool i915_in_reset(struct pci_dev *pdev) { … } static int i915_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static bool g4x_reset_complete(struct pci_dev *pdev) { … } static int g33_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static int g4x_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */ static int gen6_hw_domain_reset(struct intel_gt *gt, u32 hw_domain_mask) { … } static int __gen6_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static int gen6_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static struct intel_engine_cs *find_sfc_paired_vecs_engine(struct intel_engine_cs *engine) { … } struct sfc_lock_data { … }; static void get_sfc_forced_lock_data(struct intel_engine_cs *engine, struct sfc_lock_data *sfc_lock) { … } static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *reset_mask, u32 *unlock_mask) { … } static void gen11_unlock_sfc(struct intel_engine_cs *engine) { … } static int __gen11_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static int gen8_engine_reset_prepare(struct intel_engine_cs *engine) { … } static void gen8_engine_reset_cancel(struct intel_engine_cs *engine) { … } static int gen8_reset_engines(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned int retry) { … } static int mock_reset(struct intel_gt *gt, intel_engine_mask_t mask, unsigned int retry) { … } reset_func; static reset_func intel_get_gpu_reset(const struct intel_gt *gt) { … } static int __reset_guc(struct intel_gt *gt) { … } static bool needs_wa_14015076503(struct intel_gt *gt, intel_engine_mask_t engine_mask) { … } static intel_engine_mask_t wa_14015076503_start(struct intel_gt *gt, intel_engine_mask_t engine_mask, bool first) { … } static void wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask) { … } static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask) { … } bool intel_has_gpu_reset(const struct intel_gt *gt) { … } bool intel_has_reset_engine(const struct intel_gt *gt) { … } int intel_reset_guc(struct intel_gt *gt) { … } /* * Ensure irq handler finishes, and not run again. * Also return the active request so that we only search for it once. */ static void reset_prepare_engine(struct intel_engine_cs *engine) { … } static void revoke_mmaps(struct intel_gt *gt) { … } static intel_engine_mask_t reset_prepare(struct intel_gt *gt) { … } static void gt_revoke(struct intel_gt *gt) { … } static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask) { … } static void reset_finish_engine(struct intel_engine_cs *engine) { … } static void reset_finish(struct intel_gt *gt, intel_engine_mask_t awake) { … } static void nop_submit_request(struct i915_request *request) { … } static void __intel_gt_set_wedged(struct intel_gt *gt) { … } static void set_wedged_work(struct work_struct *w) { … } void intel_gt_set_wedged(struct intel_gt *gt) { … } static bool __intel_gt_unset_wedged(struct intel_gt *gt) { … } bool intel_gt_unset_wedged(struct intel_gt *gt) { … } static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask) { … } static int resume(struct intel_gt *gt) { … } /** * intel_gt_reset - reset chip after a hang * @gt: #intel_gt to reset * @stalled_mask: mask of the stalled engines with the guilty requests * @reason: user error message for why we are resetting * * Reset the chip. Useful if a hang is detected. Marks the device as wedged * on failure. * * Procedure is fairly simple: * - reset the chip using the reset reg * - re-init context state * - re-init hardware status page * - re-init ring buffer * - re-init interrupt state * - re-init display */ void intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask, const char *reason) { … } /** * intel_gt_reset_all_engines() - Reset all engines in the given gt. * @gt: the GT to reset all engines for. * * This function resets all engines within the given gt. * * Returns: * Zero on success, negative error code on failure. */ int intel_gt_reset_all_engines(struct intel_gt *gt) { … } /** * intel_gt_reset_engine() - Reset a specific engine within a gt. * @engine: engine to be reset. * * This function resets the specified engine within a gt. * * Returns: * Zero on success, negative error code on failure. */ int intel_gt_reset_engine(struct intel_engine_cs *engine) { … } int __intel_engine_reset_bh(struct intel_engine_cs *engine, const char *msg) { … } /** * intel_engine_reset - reset GPU engine to recover from a hang * @engine: engine to reset * @msg: reason for GPU reset; or NULL for no drm_notice() * * Reset a specific GPU engine. Useful if a hang is detected. * Returns zero on successful reset or otherwise an error code. * * Procedure is: * - identifies the request that caused the hang and it is dropped * - reset engine (which will force the engine to idle) * - re-init/configure engine */ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg) { … } static void intel_gt_reset_global(struct intel_gt *gt, u32 engine_mask, const char *reason) { … } /** * intel_gt_handle_error - handle a gpu error * @gt: the intel_gt * @engine_mask: mask representing engines that are hung * @flags: control flags * @fmt: Error message format string * * Do some basic checking of register state at error time and * dump it to the syslog. Also call i915_capture_error_state() to make * sure we get a record and make it available in debugfs. Fire a uevent * so userspace knows something bad happened (should trigger collection * of a ring dump etc.). */ void intel_gt_handle_error(struct intel_gt *gt, intel_engine_mask_t engine_mask, unsigned long flags, const char *fmt, ...) { … } static int _intel_gt_reset_lock(struct intel_gt *gt, int *srcu, bool retry) { … } int intel_gt_reset_trylock(struct intel_gt *gt, int *srcu) { … } int intel_gt_reset_lock_interruptible(struct intel_gt *gt, int *srcu) { … } void intel_gt_reset_unlock(struct intel_gt *gt, int tag) __releases(>->reset.backoff_srcu) { … } int intel_gt_terminally_wedged(struct intel_gt *gt) { … } void intel_gt_set_wedged_on_init(struct intel_gt *gt) { … } void intel_gt_set_wedged_on_fini(struct intel_gt *gt) { … } void intel_gt_init_reset(struct intel_gt *gt) { … } void intel_gt_fini_reset(struct intel_gt *gt) { … } static void intel_wedge_me(struct work_struct *work) { … } void __intel_init_wedge(struct intel_wedge_me *w, struct intel_gt *gt, long timeout, const char *name) { … } void __intel_fini_wedge(struct intel_wedge_me *w) { … } /* * Wa_22011802037 requires that we (or the GuC) ensure that no command * streamers are executing MI_FORCE_WAKE while an engine reset is initiated. */ bool intel_engine_reset_needs_wa_22011802037(struct intel_gt *gt) { … } #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) #include "selftest_reset.c" #include "selftest_hangcheck.c" #endif
Codebase Browser
linux