linux/drivers/phy/st/phy-spear1340-miphy.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * ST spear1340-miphy driver
 *
 * Copyright (C) 2014 ST Microelectronics
 * Pratyush Anand <[email protected]>
 * Mohit Kumar <[email protected]>
 */

#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

/* SPEAr1340 Registers */
/* Power Management Registers */
#define SPEAR1340_PCM_CFG …
	#define SPEAR1340_PCM_CFG_SATA_POWER_EN …
#define SPEAR1340_PCM_WKUP_CFG …
#define SPEAR1340_SWITCH_CTR …

#define SPEAR1340_PERIP1_SW_RST …
	#define SPEAR1340_PERIP1_SW_RSATA …
#define SPEAR1340_PERIP2_SW_RST …
#define SPEAR1340_PERIP3_SW_RST …

/* PCIE - SATA configuration registers */
#define SPEAR1340_PCIE_SATA_CFG …
	/* PCIE CFG MASks */
	#define SPEAR1340_PCIE_CFG_DEVICE_PRESENT …
	#define SPEAR1340_PCIE_CFG_POWERUP_RESET …
	#define SPEAR1340_PCIE_CFG_CORE_CLK_EN …
	#define SPEAR1340_PCIE_CFG_AUX_CLK_EN …
	#define SPEAR1340_SATA_CFG_TX_CLK_EN …
	#define SPEAR1340_SATA_CFG_RX_CLK_EN …
	#define SPEAR1340_SATA_CFG_POWERUP_RESET …
	#define SPEAR1340_SATA_CFG_PM_CLK_EN …
	#define SPEAR1340_PCIE_SATA_SEL_PCIE …
	#define SPEAR1340_PCIE_SATA_SEL_SATA …
	#define SPEAR1340_PCIE_SATA_CFG_MASK …
	#define SPEAR1340_PCIE_CFG_VAL …
	#define SPEAR1340_SATA_CFG_VAL …

#define SPEAR1340_PCIE_MIPHY_CFG …
	#define SPEAR1340_MIPHY_OSC_BYPASS_EXT …
	#define SPEAR1340_MIPHY_CLK_REF_DIV2 …
	#define SPEAR1340_MIPHY_CLK_REF_DIV4 …
	#define SPEAR1340_MIPHY_CLK_REF_DIV8 …
	#define SPEAR1340_MIPHY_PLL_RATIO_TOP(x) …
	#define SPEAR1340_PCIE_MIPHY_CFG_MASK …
	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA …
	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK …
	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_PCIE …

enum spear1340_miphy_mode { … };

struct spear1340_miphy_priv { … };

static int spear1340_miphy_sata_init(struct spear1340_miphy_priv *priv)
{ … }

static int spear1340_miphy_sata_exit(struct spear1340_miphy_priv *priv)
{ … }

static int spear1340_miphy_pcie_init(struct spear1340_miphy_priv *priv)
{ … }

static int spear1340_miphy_pcie_exit(struct spear1340_miphy_priv *priv)
{ … }

static int spear1340_miphy_init(struct phy *phy)
{ … }

static int spear1340_miphy_exit(struct phy *phy)
{ … }

static const struct of_device_id spear1340_miphy_of_match[] = …;
MODULE_DEVICE_TABLE(of, spear1340_miphy_of_match);

static const struct phy_ops spear1340_miphy_ops = …;

#ifdef CONFIG_PM_SLEEP
static int spear1340_miphy_suspend(struct device *dev)
{ … }

static int spear1340_miphy_resume(struct device *dev)
{ … }
#endif

static SIMPLE_DEV_PM_OPS(spear1340_miphy_pm_ops, spear1340_miphy_suspend,
			 spear1340_miphy_resume);

static struct phy *spear1340_miphy_xlate(struct device *dev,
					 const struct of_phandle_args *args)
{ … }

static int spear1340_miphy_probe(struct platform_device *pdev)
{ … }

static struct platform_driver spear1340_miphy_driver = …;

module_platform_driver(…) …;

MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;