// SPDX-License-Identifier: MIT /* * Copyright © 2014-2019 Intel Corporation * * Authors: * Vinit Azad <[email protected]> * Ben Widawsky <[email protected]> * Dave Gordon <[email protected]> * Alex Dai <[email protected]> */ #include "gt/intel_gt.h" #include "gt/intel_gt_mcr.h" #include "gt/intel_gt_regs.h" #include "gt/intel_rps.h" #include "intel_guc_fw.h" #include "intel_guc_print.h" #include "i915_drv.h" static void guc_prepare_xfer(struct intel_gt *gt) { … } static int guc_xfer_rsa_mmio(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) { … } static int guc_xfer_rsa_vma(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) { … } /* Copy RSA signature from the fw image to HW for verification */ static int guc_xfer_rsa(struct intel_uc_fw *guc_fw, struct intel_uncore *uncore) { … } /* * Read the GuC status register (GUC_STATUS) and store it in the * specified location; then return a boolean indicating whether * the value matches either completion or a known failure code. * * This is used for polling the GuC status in a wait_for() * loop below. */ static inline bool guc_load_done(struct intel_uncore *uncore, u32 *status, bool *success) { … } /* * Use a longer timeout for debug builds so that problems can be detected * and analysed. But a shorter timeout for releases so that user's don't * wait forever to find out there is a problem. Note that the only reason * an end user should hit the timeout is in case of extreme thermal throttling. * And a system that is that hot during boot is probably dead anyway! */ #if defined(CONFIG_DRM_I915_DEBUG_GEM) #define GUC_LOAD_RETRY_LIMIT … #else #define GUC_LOAD_RETRY_LIMIT … #endif static int guc_wait_ucode(struct intel_guc *guc) { … } /** * intel_guc_fw_upload() - load GuC uCode to device * @guc: intel_guc structure * * Called from intel_uc_init_hw() during driver load, resume from sleep and * after a GPU reset. * * The firmware image should have already been fetched into memory, so only * check that fetch succeeded, and then transfer the image to the h/w. * * Return: non-zero code on error */ int intel_guc_fw_upload(struct intel_guc *guc) { … }