linux/drivers/gpu/drm/i915/gt/uc/intel_uc.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2016-2019 Intel Corporation
 */

#include <linux/string_helpers.h>

#include "gt/intel_gt.h"
#include "gt/intel_gt_print.h"
#include "gt/intel_reset.h"
#include "intel_gsc_fw.h"
#include "intel_gsc_uc.h"
#include "intel_guc.h"
#include "intel_guc_ads.h"
#include "intel_guc_print.h"
#include "intel_guc_submission.h"
#include "gt/intel_rps.h"
#include "intel_uc.h"

#include "i915_drv.h"
#include "i915_hwmon.h"

static const struct intel_uc_ops uc_ops_off;
static const struct intel_uc_ops uc_ops_on;

static void uc_expand_default_options(struct intel_uc *uc)
{ … }

/* Reset GuC providing us with fresh state for both GuC and HuC.
 */
static int __intel_uc_reset_hw(struct intel_uc *uc)
{ … }

static void __confirm_options(struct intel_uc *uc)
{ … }

void intel_uc_init_early(struct intel_uc *uc)
{ … }

void intel_uc_init_late(struct intel_uc *uc)
{ … }

void intel_uc_driver_late_release(struct intel_uc *uc)
{ … }

/**
 * intel_uc_init_mmio - setup uC MMIO access
 * @uc: the intel_uc structure
 *
 * Setup minimal state necessary for MMIO accesses later in the
 * initialization sequence.
 */
void intel_uc_init_mmio(struct intel_uc *uc)
{ … }

static void __uc_capture_load_err_log(struct intel_uc *uc)
{ … }

static void __uc_free_load_err_log(struct intel_uc *uc)
{ … }

void intel_uc_driver_remove(struct intel_uc *uc)
{ … }

/*
 * Events triggered while CT buffers are disabled are logged in the SCRATCH_15
 * register using the same bits used in the CT message payload. Since our
 * communication channel with guc is turned off at this point, we can save the
 * message and handle it after we turn it back on.
 */
static void guc_clear_mmio_msg(struct intel_guc *guc)
{ … }

static void guc_get_mmio_msg(struct intel_guc *guc)
{ … }

static void guc_handle_mmio_msg(struct intel_guc *guc)
{ … }

static int guc_enable_communication(struct intel_guc *guc)
{ … }

static void guc_disable_communication(struct intel_guc *guc)
{ … }

static void __uc_fetch_firmwares(struct intel_uc *uc)
{ … }

static void __uc_cleanup_firmwares(struct intel_uc *uc)
{ … }

static int __uc_init(struct intel_uc *uc)
{ … }

static void __uc_fini(struct intel_uc *uc)
{ … }

static int __uc_sanitize(struct intel_uc *uc)
{ … }

/* Initialize and verify the uC regs related to uC positioning in WOPCM */
static int uc_init_wopcm(struct intel_uc *uc)
{ … }

static bool uc_is_wopcm_locked(struct intel_uc *uc)
{ … }

static int __uc_check_hw(struct intel_uc *uc)
{ … }

static void print_fw_ver(struct intel_gt *gt, struct intel_uc_fw *fw)
{ … }

static int __uc_init_hw(struct intel_uc *uc)
{ … }

static void __uc_fini_hw(struct intel_uc *uc)
{ … }

/**
 * intel_uc_reset_prepare - Prepare for reset
 * @uc: the intel_uc structure
 *
 * Preparing for full gpu reset.
 */
void intel_uc_reset_prepare(struct intel_uc *uc)
{ … }

void intel_uc_reset(struct intel_uc *uc, intel_engine_mask_t stalled)
{ … }

void intel_uc_reset_finish(struct intel_uc *uc)
{ … }

void intel_uc_cancel_requests(struct intel_uc *uc)
{ … }

void intel_uc_runtime_suspend(struct intel_uc *uc)
{ … }

void intel_uc_suspend(struct intel_uc *uc)
{ … }

static void __uc_resume_mappings(struct intel_uc *uc)
{ … }

static int __uc_resume(struct intel_uc *uc, bool enable_communication)
{ … }

int intel_uc_resume(struct intel_uc *uc)
{ … }

int intel_uc_runtime_resume(struct intel_uc *uc)
{ … }

static const struct intel_uc_ops uc_ops_off = …;

static const struct intel_uc_ops uc_ops_on = …;