linux/drivers/gpu/drm/i915/gt/intel_gsc.c

// SPDX-License-Identifier: MIT
/*
 * Copyright(c) 2019-2022, Intel Corporation. All rights reserved.
 */

#include <linux/irq.h>
#include <linux/mei_aux.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_region.h"
#include "gt/intel_gsc.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_print.h"

#define GSC_BAR_LENGTH

static void gsc_irq_mask(struct irq_data *d)
{}

static void gsc_irq_unmask(struct irq_data *d)
{}

static struct irq_chip gsc_irq_chip =;

static int gsc_irq_init(int irq)
{}

static int
gsc_ext_om_alloc(struct intel_gsc *gsc, struct intel_gsc_intf *intf, size_t size)
{}

static void gsc_ext_om_destroy(struct intel_gsc_intf *intf)
{}

struct gsc_def {};

/* gsc resources and definitions (HECI1 and HECI2) */
static const struct gsc_def gsc_def_dg1[] =;

static const struct gsc_def gsc_def_dg2[] =;

static void gsc_release_dev(struct device *dev)
{}

static void gsc_destroy_one(struct drm_i915_private *i915,
			    struct intel_gsc *gsc, unsigned int intf_id)
{}

static void gsc_init_one(struct drm_i915_private *i915, struct intel_gsc *gsc,
			 unsigned int intf_id)
{}

static void gsc_irq_handler(struct intel_gt *gt, unsigned int intf_id)
{}

void intel_gsc_irq_handler(struct intel_gt *gt, u32 iir)
{}

void intel_gsc_init(struct intel_gsc *gsc, struct drm_i915_private *i915)
{}

void intel_gsc_fini(struct intel_gsc *gsc)
{}