linux/drivers/phy/tegra/phy-tegra194-p2u.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * P2U (PIPE to UPHY) driver for Tegra T194 SoC
 *
 * Copyright (C) 2019-2022 NVIDIA Corporation.
 *
 * Author: Vidya Sagar <[email protected]>
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>

#define P2U_CONTROL_CMN …
#define P2U_CONTROL_CMN_ENABLE_L2_EXIT_RATE_CHANGE …
#define P2U_CONTROL_CMN_SKP_SIZE_PROTECTION_EN …

#define P2U_PERIODIC_EQ_CTRL_GEN3 …
#define P2U_PERIODIC_EQ_CTRL_GEN3_PERIODIC_EQ_EN …
#define P2U_PERIODIC_EQ_CTRL_GEN3_INIT_PRESET_EQ_TRAIN_EN …
#define P2U_PERIODIC_EQ_CTRL_GEN4 …
#define P2U_PERIODIC_EQ_CTRL_GEN4_INIT_PRESET_EQ_TRAIN_EN …

#define P2U_RX_DEBOUNCE_TIME …
#define P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_MASK …
#define P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_VAL …

#define P2U_DIR_SEARCH_CTRL …
#define P2U_DIR_SEARCH_CTRL_GEN4_FINE_GRAIN_SEARCH_TWICE …

struct tegra_p2u_of_data { … };

struct tegra_p2u { … };

static inline void p2u_writel(struct tegra_p2u *phy, const u32 value,
			      const u32 reg)
{ … }

static inline u32 p2u_readl(struct tegra_p2u *phy, const u32 reg)
{ … }

static int tegra_p2u_power_on(struct phy *x)
{ … }

static int tegra_p2u_calibrate(struct phy *x)
{ … }

static const struct phy_ops ops = …;

static int tegra_p2u_probe(struct platform_device *pdev)
{ … }

static const struct tegra_p2u_of_data tegra194_p2u_of_data = …;

static const struct tegra_p2u_of_data tegra234_p2u_of_data = …;

static const struct of_device_id tegra_p2u_id_table[] = …;
MODULE_DEVICE_TABLE(of, tegra_p2u_id_table);

static struct platform_driver tegra_p2u_driver = …;
module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;