intel_display_irq.c | Explore in Territory

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2023 Intel Corporation
 */

#include "gt/intel_rps.h"
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "icl_dsi_regs.h"
#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_trace.h"
#include "intel_display_types.h"
#include "intel_dp_aux.h"
#include "intel_dsb.h"
#include "intel_fdi_regs.h"
#include "intel_fifo_underrun.h"
#include "intel_gmbus.h"
#include "intel_hotplug_irq.h"
#include "intel_pipe_crc_regs.h"
#include "intel_pmdemand.h"
#include "intel_psr.h"
#include "intel_psr_regs.h"

static void
intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
{ … }

/**
 * ilk_update_display_irq - update DEIMR
 * @dev_priv: driver private
 * @interrupt_mask: mask of interrupt bits to update
 * @enabled_irq_mask: mask of interrupt bits to enable
 */
void ilk_update_display_irq(struct drm_i915_private *dev_priv,
			    u32 interrupt_mask, u32 enabled_irq_mask)
{ … }

void ilk_enable_display_irq(struct drm_i915_private *i915, u32 bits)
{ … }

void ilk_disable_display_irq(struct drm_i915_private *i915, u32 bits)
{ … }

/**
 * bdw_update_port_irq - update DE port interrupt
 * @dev_priv: driver private
 * @interrupt_mask: mask of interrupt bits to update
 * @enabled_irq_mask: mask of interrupt bits to enable
 */
void bdw_update_port_irq(struct drm_i915_private *dev_priv,
			 u32 interrupt_mask, u32 enabled_irq_mask)
{ … }

/**
 * bdw_update_pipe_irq - update DE pipe interrupt
 * @dev_priv: driver private
 * @pipe: pipe whose interrupt to update
 * @interrupt_mask: mask of interrupt bits to update
 * @enabled_irq_mask: mask of interrupt bits to enable
 */
static void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,
				enum pipe pipe, u32 interrupt_mask,
				u32 enabled_irq_mask)
{ … }

void bdw_enable_pipe_irq(struct drm_i915_private *i915,
			 enum pipe pipe, u32 bits)
{ … }

void bdw_disable_pipe_irq(struct drm_i915_private *i915,
			  enum pipe pipe, u32 bits)
{ … }

/**
 * ibx_display_interrupt_update - update SDEIMR
 * @dev_priv: driver private
 * @interrupt_mask: mask of interrupt bits to update
 * @enabled_irq_mask: mask of interrupt bits to enable
 */
void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
				  u32 interrupt_mask,
				  u32 enabled_irq_mask)
{ … }

void ibx_enable_display_interrupt(struct drm_i915_private *i915, u32 bits)
{ … }

void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits)
{ … }

u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,
			      enum pipe pipe)
{ … }

void i915_enable_pipestat(struct drm_i915_private *dev_priv,
			  enum pipe pipe, u32 status_mask)
{ … }

void i915_disable_pipestat(struct drm_i915_private *dev_priv,
			   enum pipe pipe, u32 status_mask)
{ … }

static bool i915_has_asle(struct drm_i915_private *i915)
{ … }

/**
 * i915_enable_asle_pipestat - enable ASLE pipestat for OpRegion
 * @dev_priv: i915 device private
 */
void i915_enable_asle_pipestat(struct drm_i915_private *dev_priv)
{ … }

#if defined(CONFIG_DEBUG_FS)
static void display_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
					 enum pipe pipe,
					 u32 crc0, u32 crc1,
					 u32 crc2, u32 crc3,
					 u32 crc4)
{ … }
#else
static inline void
display_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
			     enum pipe pipe,
			     u32 crc0, u32 crc1,
			     u32 crc2, u32 crc3,
			     u32 crc4) {}
#endif

static void flip_done_handler(struct drm_i915_private *i915,
			      enum pipe pipe)
{ … }

static void hsw_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
				     enum pipe pipe)
{ … }

static void ivb_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
				     enum pipe pipe)
{ … }

static void i9xx_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
				      enum pipe pipe)
{ … }

void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
{ … }

void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
			   u32 iir, u32 pipe_stats[I915_MAX_PIPES])
{ … }

void i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv,
			       u16 iir, u32 pipe_stats[I915_MAX_PIPES])
{ … }

void i915_pipestat_irq_handler(struct drm_i915_private *dev_priv,
			       u32 iir, u32 pipe_stats[I915_MAX_PIPES])
{ … }

void i965_pipestat_irq_handler(struct drm_i915_private *dev_priv,
			       u32 iir, u32 pipe_stats[I915_MAX_PIPES])
{ … }

void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
				     u32 pipe_stats[I915_MAX_PIPES])
{ … }

static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{ … }

static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
{ … }

static void cpt_serr_int_handler(struct drm_i915_private *dev_priv)
{ … }

static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{ … }

void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
{ … }

void ivb_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
{ … }

static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
{ … }

static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
{ … }

static void intel_pmdemand_irq_handler(struct drm_i915_private *dev_priv)
{ … }

static void
gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
{ … }

static void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
					   u32 te_trigger)
{ … }

static u32 gen8_de_pipe_flip_done_mask(struct drm_i915_private *i915)
{ … }

u32 gen8_de_pipe_underrun_mask(struct drm_i915_private *dev_priv)
{ … }

static void gen8_read_and_ack_pch_irqs(struct drm_i915_private *i915, u32 *pch_iir, u32 *pica_iir)
{ … }

void gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
{ … }

u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl)
{ … }

void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir)
{ … }

void gen11_display_irq_handler(struct drm_i915_private *i915)
{ … }

/* Called from drm generic code, passed 'crtc' which
 * we use as a pipe index
 */
int i8xx_enable_vblank(struct drm_crtc *crtc)
{ … }

int i915gm_enable_vblank(struct drm_crtc *crtc)
{ … }

int i965_enable_vblank(struct drm_crtc *crtc)
{ … }

int ilk_enable_vblank(struct drm_crtc *crtc)
{ … }

static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
				   bool enable)
{ … }

int bdw_enable_vblank(struct drm_crtc *_crtc)
{ … }

/* Called from drm generic code, passed 'crtc' which
 * we use as a pipe index
 */
void i8xx_disable_vblank(struct drm_crtc *crtc)
{ … }

void i915gm_disable_vblank(struct drm_crtc *crtc)
{ … }

void i965_disable_vblank(struct drm_crtc *crtc)
{ … }

void ilk_disable_vblank(struct drm_crtc *crtc)
{ … }

void bdw_disable_vblank(struct drm_crtc *_crtc)
{ … }

void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
{ … }

void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
{ … }

void gen8_display_irq_reset(struct drm_i915_private *dev_priv)
{ … }

void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
{ … }

void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
				     u8 pipe_mask)
{ … }

void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
				     u8 pipe_mask)
{ … }

/*
 * SDEIER is also touched by the interrupt handler to work around missed PCH
 * interrupts. Hence we can't update it after the interrupt handler is enabled -
 * instead we unconditionally enable all PCH interrupt sources here, but then
 * only unmask them as needed with SDEIMR.
 *
 * Note that we currently do this after installing the interrupt handler,
 * but before we enable the master interrupt. That should be sufficient
 * to avoid races with the irq handler, assuming we have MSI. Shared legacy
 * interrupts could still race.
 */
static void ibx_irq_postinstall(struct drm_i915_private *dev_priv)
{ … }

void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv)
{ … }

void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)
{ … }

void ilk_de_irq_postinstall(struct drm_i915_private *i915)
{ … }

static void mtp_irq_postinstall(struct drm_i915_private *i915);
static void icp_irq_postinstall(struct drm_i915_private *i915);

void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
{ … }

static void mtp_irq_postinstall(struct drm_i915_private *i915)
{ … }

static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
{ … }

void gen11_de_irq_postinstall(struct drm_i915_private *dev_priv)
{ … }

void dg1_de_irq_postinstall(struct drm_i915_private *i915)
{ … }

void intel_display_irq_init(struct drm_i915_private *i915)
{ … }
linux/drivers/gpu/drm/i915/display/intel_display_irq.c
