/* SPDX-License-Identifier: MIT */ /* * Copyright © 2022 Intel Corporation */ #ifndef __VLV_DSI_REGS_H__ #define __VLV_DSI_REGS_H__ #include "intel_display_reg_defs.h" #define VLV_MIPI_BASE … #define BXT_MIPI_BASE … #define _MIPI_MMIO_BASE(display) … #define _MIPI_PORT(port, a, c) … #define _MMIO_MIPI(base, port, a, c) … /* BXT MIPI mode configure */ #define _BXT_MIPIA_TRANS_HACTIVE … #define _BXT_MIPIC_TRANS_HACTIVE … #define BXT_MIPI_TRANS_HACTIVE(tc) … #define _BXT_MIPIA_TRANS_VACTIVE … #define _BXT_MIPIC_TRANS_VACTIVE … #define BXT_MIPI_TRANS_VACTIVE(tc) … #define _BXT_MIPIA_TRANS_VTOTAL … #define _BXT_MIPIC_TRANS_VTOTAL … #define BXT_MIPI_TRANS_VTOTAL(tc) … #define BXT_P_DSI_REGULATOR_CFG … #define STAP_SELECT … #define BXT_P_DSI_REGULATOR_TX_CTRL … #define HS_IO_CTRL_SELECT … #define _MIPIA_PORT_CTRL … #define _MIPIC_PORT_CTRL … #define VLV_MIPI_PORT_CTRL(port) … /* BXT port control */ #define _BXT_MIPIA_PORT_CTRL … #define _BXT_MIPIC_PORT_CTRL … #define BXT_MIPI_PORT_CTRL(tc) … #define DPI_ENABLE … #define MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT … #define MIPIA_MIPI4DPHY_DELAY_COUNT_MASK … #define DUAL_LINK_MODE_SHIFT … #define DUAL_LINK_MODE_MASK … #define DUAL_LINK_MODE_FRONT_BACK … #define DUAL_LINK_MODE_PIXEL_ALTERNATIVE … #define DITHERING_ENABLE … #define FLOPPED_HSTX … #define DE_INVERT … #define MIPIA_FLISDSI_DELAY_COUNT_SHIFT … #define MIPIA_FLISDSI_DELAY_COUNT_MASK … #define AFE_LATCHOUT … #define LP_OUTPUT_HOLD … #define MIPIC_FLISDSI_DELAY_COUNT_HIGH_SHIFT … #define MIPIC_FLISDSI_DELAY_COUNT_HIGH_MASK … #define MIPIC_MIPI4DPHY_DELAY_COUNT_SHIFT … #define MIPIC_MIPI4DPHY_DELAY_COUNT_MASK … #define CSB_SHIFT … #define CSB_MASK … #define CSB_20MHZ … #define CSB_10MHZ … #define CSB_40MHZ … #define BANDGAP_MASK … #define BANDGAP_PNW_CIRCUIT … #define BANDGAP_LNC_CIRCUIT … #define MIPIC_FLISDSI_DELAY_COUNT_LOW_SHIFT … #define MIPIC_FLISDSI_DELAY_COUNT_LOW_MASK … #define TEARING_EFFECT_DELAY … #define TEARING_EFFECT_SHIFT … #define TEARING_EFFECT_MASK … #define TEARING_EFFECT_OFF … #define TEARING_EFFECT_DSI … #define TEARING_EFFECT_GPIO … #define LANE_CONFIGURATION_SHIFT … #define LANE_CONFIGURATION_MASK … #define LANE_CONFIGURATION_4LANE … #define LANE_CONFIGURATION_DUAL_LINK_A … #define LANE_CONFIGURATION_DUAL_LINK_B … #define _MIPIA_TEARING_CTRL … #define _MIPIC_TEARING_CTRL … #define VLV_MIPI_TEARING_CTRL(port) … #define TEARING_EFFECT_DELAY_SHIFT … #define TEARING_EFFECT_DELAY_MASK … /* MIPI DSI Controller and D-PHY registers */ #define _MIPIA_DEVICE_READY … #define _MIPIC_DEVICE_READY … #define MIPI_DEVICE_READY(display, port) … #define BUS_POSSESSION … #define ULPS_STATE_MASK … #define ULPS_STATE_ENTER … #define ULPS_STATE_EXIT … #define ULPS_STATE_NORMAL_OPERATION … #define DEVICE_READY … #define _MIPIA_INTR_STAT … #define _MIPIC_INTR_STAT … #define MIPI_INTR_STAT(display, port) … #define _MIPIA_INTR_EN … #define _MIPIC_INTR_EN … #define MIPI_INTR_EN(display, port) … #define TEARING_EFFECT … #define SPL_PKT_SENT_INTERRUPT … #define GEN_READ_DATA_AVAIL … #define LP_GENERIC_WR_FIFO_FULL … #define HS_GENERIC_WR_FIFO_FULL … #define RX_PROT_VIOLATION … #define RX_INVALID_TX_LENGTH … #define ACK_WITH_NO_ERROR … #define TURN_AROUND_ACK_TIMEOUT … #define LP_RX_TIMEOUT … #define HS_TX_TIMEOUT … #define DPI_FIFO_UNDERRUN … #define LOW_CONTENTION … #define HIGH_CONTENTION … #define TXDSI_VC_ID_INVALID … #define TXDSI_DATA_TYPE_NOT_RECOGNISED … #define TXCHECKSUM_ERROR … #define TXECC_MULTIBIT_ERROR … #define TXECC_SINGLE_BIT_ERROR … #define TXFALSE_CONTROL_ERROR … #define RXDSI_VC_ID_INVALID … #define RXDSI_DATA_TYPE_NOT_REGOGNISED … #define RXCHECKSUM_ERROR … #define RXECC_MULTIBIT_ERROR … #define RXECC_SINGLE_BIT_ERROR … #define RXFALSE_CONTROL_ERROR … #define RXHS_RECEIVE_TIMEOUT_ERROR … #define RX_LP_TX_SYNC_ERROR … #define RXEXCAPE_MODE_ENTRY_ERROR … #define RXEOT_SYNC_ERROR … #define RXSOT_SYNC_ERROR … #define RXSOT_ERROR … #define _MIPIA_DSI_FUNC_PRG … #define _MIPIC_DSI_FUNC_PRG … #define MIPI_DSI_FUNC_PRG(display, port) … #define CMD_MODE_DATA_WIDTH_MASK … #define CMD_MODE_NOT_SUPPORTED … #define CMD_MODE_DATA_WIDTH_16_BIT … #define CMD_MODE_DATA_WIDTH_9_BIT … #define CMD_MODE_DATA_WIDTH_8_BIT … #define CMD_MODE_DATA_WIDTH_OPTION1 … #define CMD_MODE_DATA_WIDTH_OPTION2 … #define VID_MODE_FORMAT_MASK … #define VID_MODE_NOT_SUPPORTED … #define VID_MODE_FORMAT_RGB565 … #define VID_MODE_FORMAT_RGB666_PACKED … #define VID_MODE_FORMAT_RGB666 … #define VID_MODE_FORMAT_RGB888 … #define CMD_MODE_CHANNEL_NUMBER_SHIFT … #define CMD_MODE_CHANNEL_NUMBER_MASK … #define VID_MODE_CHANNEL_NUMBER_SHIFT … #define VID_MODE_CHANNEL_NUMBER_MASK … #define DATA_LANES_PRG_REG_SHIFT … #define DATA_LANES_PRG_REG_MASK … #define _MIPIA_HS_TX_TIMEOUT … #define _MIPIC_HS_TX_TIMEOUT … #define MIPI_HS_TX_TIMEOUT(display, port) … #define HIGH_SPEED_TX_TIMEOUT_COUNTER_MASK … #define _MIPIA_LP_RX_TIMEOUT … #define _MIPIC_LP_RX_TIMEOUT … #define MIPI_LP_RX_TIMEOUT(display, port) … #define LOW_POWER_RX_TIMEOUT_COUNTER_MASK … #define _MIPIA_TURN_AROUND_TIMEOUT … #define _MIPIC_TURN_AROUND_TIMEOUT … #define MIPI_TURN_AROUND_TIMEOUT(display, port) … #define TURN_AROUND_TIMEOUT_MASK … #define _MIPIA_DEVICE_RESET_TIMER … #define _MIPIC_DEVICE_RESET_TIMER … #define MIPI_DEVICE_RESET_TIMER(display, port) … #define DEVICE_RESET_TIMER_MASK … #define _MIPIA_DPI_RESOLUTION … #define _MIPIC_DPI_RESOLUTION … #define MIPI_DPI_RESOLUTION(display, port) … #define VERTICAL_ADDRESS_SHIFT … #define VERTICAL_ADDRESS_MASK … #define HORIZONTAL_ADDRESS_SHIFT … #define HORIZONTAL_ADDRESS_MASK … #define _MIPIA_DBI_FIFO_THROTTLE … #define _MIPIC_DBI_FIFO_THROTTLE … #define MIPI_DBI_FIFO_THROTTLE(display, port) … #define DBI_FIFO_EMPTY_HALF … #define DBI_FIFO_EMPTY_QUARTER … #define DBI_FIFO_EMPTY_7_LOCATIONS … /* regs below are bits 15:0 */ #define _MIPIA_HSYNC_PADDING_COUNT … #define _MIPIC_HSYNC_PADDING_COUNT … #define MIPI_HSYNC_PADDING_COUNT(display, port) … #define _MIPIA_HBP_COUNT … #define _MIPIC_HBP_COUNT … #define MIPI_HBP_COUNT(display, port) … #define _MIPIA_HFP_COUNT … #define _MIPIC_HFP_COUNT … #define MIPI_HFP_COUNT(display, port) … #define _MIPIA_HACTIVE_AREA_COUNT … #define _MIPIC_HACTIVE_AREA_COUNT … #define MIPI_HACTIVE_AREA_COUNT(display, port) … #define _MIPIA_VSYNC_PADDING_COUNT … #define _MIPIC_VSYNC_PADDING_COUNT … #define MIPI_VSYNC_PADDING_COUNT(display, port) … #define _MIPIA_VBP_COUNT … #define _MIPIC_VBP_COUNT … #define MIPI_VBP_COUNT(display, port) … #define _MIPIA_VFP_COUNT … #define _MIPIC_VFP_COUNT … #define MIPI_VFP_COUNT(display, port) … #define _MIPIA_HIGH_LOW_SWITCH_COUNT … #define _MIPIC_HIGH_LOW_SWITCH_COUNT … #define MIPI_HIGH_LOW_SWITCH_COUNT(display, port) … #define _MIPIA_DPI_CONTROL … #define _MIPIC_DPI_CONTROL … #define MIPI_DPI_CONTROL(display, port) … #define DPI_LP_MODE … #define BACKLIGHT_OFF … #define BACKLIGHT_ON … #define COLOR_MODE_OFF … #define COLOR_MODE_ON … #define TURN_ON … #define SHUTDOWN … #define _MIPIA_DPI_DATA … #define _MIPIC_DPI_DATA … #define MIPI_DPI_DATA(display, port) … #define COMMAND_BYTE_SHIFT … #define COMMAND_BYTE_MASK … #define _MIPIA_INIT_COUNT … #define _MIPIC_INIT_COUNT … #define MIPI_INIT_COUNT(display, port) … #define MASTER_INIT_TIMER_SHIFT … #define MASTER_INIT_TIMER_MASK … #define _MIPIA_MAX_RETURN_PKT_SIZE … #define _MIPIC_MAX_RETURN_PKT_SIZE … #define MIPI_MAX_RETURN_PKT_SIZE(display, port) … #define MAX_RETURN_PKT_SIZE_SHIFT … #define MAX_RETURN_PKT_SIZE_MASK … #define _MIPIA_VIDEO_MODE_FORMAT … #define _MIPIC_VIDEO_MODE_FORMAT … #define MIPI_VIDEO_MODE_FORMAT(display, port) … #define RANDOM_DPI_DISPLAY_RESOLUTION … #define DISABLE_VIDEO_BTA … #define IP_TG_CONFIG … #define VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE … #define VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS … #define VIDEO_MODE_BURST … #define _MIPIA_EOT_DISABLE … #define _MIPIC_EOT_DISABLE … #define MIPI_EOT_DISABLE(display, port) … #define BXT_DEFEATURE_DPI_FIFO_CTR … #define BXT_DPHY_DEFEATURE_EN … #define LP_RX_TIMEOUT_ERROR_RECOVERY_DISABLE … #define HS_RX_TIMEOUT_ERROR_RECOVERY_DISABLE … #define LOW_CONTENTION_RECOVERY_DISABLE … #define HIGH_CONTENTION_RECOVERY_DISABLE … #define TXDSI_TYPE_NOT_RECOGNISED_ERROR_RECOVERY_DISABLE … #define TXECC_MULTIBIT_ERROR_RECOVERY_DISABLE … #define CLOCKSTOP … #define EOT_DISABLE … #define _MIPIA_LP_BYTECLK … #define _MIPIC_LP_BYTECLK … #define MIPI_LP_BYTECLK(display, port) … #define LP_BYTECLK_SHIFT … #define LP_BYTECLK_MASK … #define _MIPIA_TLPX_TIME_COUNT … #define _MIPIC_TLPX_TIME_COUNT … #define MIPI_TLPX_TIME_COUNT(display, port) … #define _MIPIA_CLK_LANE_TIMING … #define _MIPIC_CLK_LANE_TIMING … #define MIPI_CLK_LANE_TIMING(display, port) … /* bits 31:0 */ #define _MIPIA_LP_GEN_DATA … #define _MIPIC_LP_GEN_DATA … #define MIPI_LP_GEN_DATA(display, port) … /* bits 31:0 */ #define _MIPIA_HS_GEN_DATA … #define _MIPIC_HS_GEN_DATA … #define MIPI_HS_GEN_DATA(display, port) … #define _MIPIA_LP_GEN_CTRL … #define _MIPIC_LP_GEN_CTRL … #define MIPI_LP_GEN_CTRL(display, port) … #define _MIPIA_HS_GEN_CTRL … #define _MIPIC_HS_GEN_CTRL … #define MIPI_HS_GEN_CTRL(display, port) … #define LONG_PACKET_WORD_COUNT_SHIFT … #define LONG_PACKET_WORD_COUNT_MASK … #define SHORT_PACKET_PARAM_SHIFT … #define SHORT_PACKET_PARAM_MASK … #define VIRTUAL_CHANNEL_SHIFT … #define VIRTUAL_CHANNEL_MASK … #define DATA_TYPE_SHIFT … #define DATA_TYPE_MASK … /* data type values, see include/video/mipi_display.h */ #define _MIPIA_GEN_FIFO_STAT … #define _MIPIC_GEN_FIFO_STAT … #define MIPI_GEN_FIFO_STAT(display, port) … #define DPI_FIFO_EMPTY … #define DBI_FIFO_EMPTY … #define LP_CTRL_FIFO_EMPTY … #define LP_CTRL_FIFO_HALF_EMPTY … #define LP_CTRL_FIFO_FULL … #define HS_CTRL_FIFO_EMPTY … #define HS_CTRL_FIFO_HALF_EMPTY … #define HS_CTRL_FIFO_FULL … #define LP_DATA_FIFO_EMPTY … #define LP_DATA_FIFO_HALF_EMPTY … #define LP_DATA_FIFO_FULL … #define HS_DATA_FIFO_EMPTY … #define HS_DATA_FIFO_HALF_EMPTY … #define HS_DATA_FIFO_FULL … #define _MIPIA_HS_LS_DBI_ENABLE … #define _MIPIC_HS_LS_DBI_ENABLE … #define MIPI_HS_LP_DBI_ENABLE(display, port) … #define DBI_HS_LP_MODE_MASK … #define DBI_LP_MODE … #define DBI_HS_MODE … #define _MIPIA_DPHY_PARAM … #define _MIPIC_DPHY_PARAM … #define MIPI_DPHY_PARAM(display, port) … #define EXIT_ZERO_COUNT_SHIFT … #define EXIT_ZERO_COUNT_MASK … #define TRAIL_COUNT_SHIFT … #define TRAIL_COUNT_MASK … #define CLK_ZERO_COUNT_SHIFT … #define CLK_ZERO_COUNT_MASK … #define PREPARE_COUNT_SHIFT … #define PREPARE_COUNT_MASK … #define _MIPIA_DBI_BW_CTRL … #define _MIPIC_DBI_BW_CTRL … #define MIPI_DBI_BW_CTRL(display, port) … #define _MIPIA_CLK_LANE_SWITCH_TIME_CNT … #define _MIPIC_CLK_LANE_SWITCH_TIME_CNT … #define MIPI_CLK_LANE_SWITCH_TIME_CNT(display, port) … #define LP_HS_SSW_CNT_SHIFT … #define LP_HS_SSW_CNT_MASK … #define HS_LP_PWR_SW_CNT_SHIFT … #define HS_LP_PWR_SW_CNT_MASK … #define _MIPIA_STOP_STATE_STALL … #define _MIPIC_STOP_STATE_STALL … #define MIPI_STOP_STATE_STALL(display, port) … #define STOP_STATE_STALL_COUNTER_SHIFT … #define STOP_STATE_STALL_COUNTER_MASK … #define _MIPIA_INTR_STAT_REG_1 … #define _MIPIC_INTR_STAT_REG_1 … #define MIPI_INTR_STAT_REG_1(display, port) … #define _MIPIA_INTR_EN_REG_1 … #define _MIPIC_INTR_EN_REG_1 … #define MIPI_INTR_EN_REG_1(display, port) … #define RX_CONTENTION_DETECTED … /* XXX: only pipe A ?!? */ #define MIPIA_DBI_TYPEC_CTRL(display) … #define DBI_TYPEC_ENABLE … #define DBI_TYPEC_WIP … #define DBI_TYPEC_OPTION_SHIFT … #define DBI_TYPEC_OPTION_MASK … #define DBI_TYPEC_FREQ_SHIFT … #define DBI_TYPEC_FREQ_MASK … #define DBI_TYPEC_OVERRIDE … #define DBI_TYPEC_OVERRIDE_COUNTER_SHIFT … #define DBI_TYPEC_OVERRIDE_COUNTER_MASK … /* MIPI adapter registers */ #define _MIPIA_CTRL … #define _MIPIC_CTRL … #define MIPI_CTRL(display, port) … #define ESCAPE_CLOCK_DIVIDER_SHIFT … #define ESCAPE_CLOCK_DIVIDER_MASK … #define ESCAPE_CLOCK_DIVIDER_1 … #define ESCAPE_CLOCK_DIVIDER_2 … #define ESCAPE_CLOCK_DIVIDER_4 … #define READ_REQUEST_PRIORITY_SHIFT … #define READ_REQUEST_PRIORITY_MASK … #define READ_REQUEST_PRIORITY_LOW … #define READ_REQUEST_PRIORITY_HIGH … #define RGB_FLIP_TO_BGR … #define BXT_PIPE_SELECT_SHIFT … #define BXT_PIPE_SELECT_MASK … #define BXT_PIPE_SELECT(pipe) … #define GLK_PHY_STATUS_PORT_READY … #define GLK_ULPS_NOT_ACTIVE … #define GLK_MIPIIO_RESET_RELEASED … #define GLK_CLOCK_LANE_STOP_STATE … #define GLK_DATA_LANE_STOP_STATE … #define GLK_LP_WAKE … #define GLK_LP11_LOW_PWR_MODE … #define GLK_LP00_LOW_PWR_MODE … #define GLK_FIREWALL_ENABLE … #define BXT_PIXEL_OVERLAP_CNT_MASK … #define BXT_PIXEL_OVERLAP_CNT_SHIFT … #define BXT_DSC_ENABLE … #define BXT_RGB_FLIP … #define GLK_MIPIIO_PORT_POWERED … #define GLK_MIPIIO_ENABLE … #define _MIPIA_DATA_ADDRESS … #define _MIPIC_DATA_ADDRESS … #define MIPI_DATA_ADDRESS(display, port) … #define DATA_MEM_ADDRESS_SHIFT … #define DATA_MEM_ADDRESS_MASK … #define DATA_VALID … #define _MIPIA_DATA_LENGTH … #define _MIPIC_DATA_LENGTH … #define MIPI_DATA_LENGTH(display, port) … #define DATA_LENGTH_SHIFT … #define DATA_LENGTH_MASK … #define _MIPIA_COMMAND_ADDRESS … #define _MIPIC_COMMAND_ADDRESS … #define MIPI_COMMAND_ADDRESS(display, port) … #define COMMAND_MEM_ADDRESS_SHIFT … #define COMMAND_MEM_ADDRESS_MASK … #define AUTO_PWG_ENABLE … #define MEMORY_WRITE_DATA_FROM_PIPE_RENDERING … #define COMMAND_VALID … #define _MIPIA_COMMAND_LENGTH … #define _MIPIC_COMMAND_LENGTH … #define MIPI_COMMAND_LENGTH(display, port) … #define COMMAND_LENGTH_SHIFT(n) … #define COMMAND_LENGTH_MASK(n) … #define _MIPIA_READ_DATA_RETURN0 … #define _MIPIC_READ_DATA_RETURN0 … #define MIPI_READ_DATA_RETURN(display, port, n) … #define _MIPIA_READ_DATA_VALID … #define _MIPIC_READ_DATA_VALID … #define MIPI_READ_DATA_VALID(display, port) … #define READ_DATA_VALID(n) … #endif /* __VLV_DSI_REGS_H__ */
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