intel_display_power_well.c | Explore in Territory

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2022 Intel Corporation
 */

#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_combo_phy.h"
#include "intel_combo_phy_regs.h"
#include "intel_crt.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_power_well.h"
#include "intel_display_types.h"
#include "intel_dkl_phy.h"
#include "intel_dkl_phy_regs.h"
#include "intel_dmc.h"
#include "intel_dmc_wl.h"
#include "intel_dp_aux_regs.h"
#include "intel_dpio_phy.h"
#include "intel_dpll.h"
#include "intel_hotplug.h"
#include "intel_pcode.h"
#include "intel_pps.h"
#include "intel_tc.h"
#include "intel_vga.h"
#include "skl_watermark.h"
#include "vlv_dpio_phy_regs.h"
#include "vlv_sideband.h"
#include "vlv_sideband_reg.h"

struct i915_power_well_regs { … };

struct i915_power_well_ops { … };

static const struct i915_power_well_instance *
i915_power_well_instance(const struct i915_power_well *power_well)
{ … }

struct i915_power_well *
lookup_power_well(struct drm_i915_private *i915,
		  enum i915_power_well_id power_well_id)
{ … }

void intel_power_well_enable(struct drm_i915_private *i915,
			     struct i915_power_well *power_well)
{ … }

void intel_power_well_disable(struct drm_i915_private *i915,
			      struct i915_power_well *power_well)
{ … }

void intel_power_well_sync_hw(struct drm_i915_private *i915,
			      struct i915_power_well *power_well)
{ … }

void intel_power_well_get(struct drm_i915_private *i915,
			  struct i915_power_well *power_well)
{ … }

void intel_power_well_put(struct drm_i915_private *i915,
			  struct i915_power_well *power_well)
{ … }

bool intel_power_well_is_enabled(struct drm_i915_private *i915,
				 struct i915_power_well *power_well)
{ … }

bool intel_power_well_is_enabled_cached(struct i915_power_well *power_well)
{ … }

bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
					 enum i915_power_well_id power_well_id)
{ … }

bool intel_power_well_is_always_on(struct i915_power_well *power_well)
{ … }

const char *intel_power_well_name(struct i915_power_well *power_well)
{ … }

struct intel_power_domain_mask *intel_power_well_domains(struct i915_power_well *power_well)
{ … }

int intel_power_well_refcount(struct i915_power_well *power_well)
{ … }

/*
 * Starting with Haswell, we have a "Power Down Well" that can be turned off
 * when not needed anymore. We have 4 registers that can request the power well
 * to be enabled, and it will only be disabled if none of the registers is
 * requesting it to be enabled.
 */
static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv,
				       u8 irq_pipe_mask, bool has_vga)
{ … }

static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv,
				       u8 irq_pipe_mask)
{ … }

#define ICL_AUX_PW_TO_PHY(pw_idx) …

#define ICL_AUX_PW_TO_CH(pw_idx) …

#define ICL_TBT_AUX_PW_TO_CH(pw_idx) …

static enum aux_ch icl_aux_pw_to_ch(const struct i915_power_well *power_well)
{ … }

static struct intel_digital_port *
aux_ch_to_digital_port(struct drm_i915_private *dev_priv,
		       enum aux_ch aux_ch)
{ … }

static enum phy icl_aux_pw_to_phy(struct drm_i915_private *i915,
				  const struct i915_power_well *power_well)
{ … }

static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well,
					   bool timeout_expected)
{ … }

static u32 hsw_power_well_requesters(struct drm_i915_private *dev_priv,
				     const struct i915_power_well_regs *regs,
				     int pw_idx)
{ … }

static void hsw_wait_for_power_well_disable(struct drm_i915_private *dev_priv,
					    struct i915_power_well *power_well)
{ … }

static void gen9_wait_for_power_well_fuses(struct drm_i915_private *dev_priv,
					   enum skl_power_gate pg)
{ … }

static void hsw_power_well_enable(struct drm_i915_private *dev_priv,
				  struct i915_power_well *power_well)
{ … }

static void hsw_power_well_disable(struct drm_i915_private *dev_priv,
				   struct i915_power_well *power_well)
{ … }

static bool intel_aux_ch_is_edp(struct drm_i915_private *i915, enum aux_ch aux_ch)
{ … }

static void
icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
				    struct i915_power_well *power_well)
{ … }

static void
icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
				     struct i915_power_well *power_well)
{ … }

#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)

static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
					struct i915_power_well *power_well,
					struct intel_digital_port *dig_port)
{ … }

#else

static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
					struct i915_power_well *power_well,
					struct intel_digital_port *dig_port)
{
}

#endif

#define TGL_AUX_PW_TO_TC_PORT(pw_idx) …

static void icl_tc_cold_exit(struct drm_i915_private *i915)
{ … }

static void
icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
				 struct i915_power_well *power_well)
{ … }

static void
icl_aux_power_well_enable(struct drm_i915_private *dev_priv,
			  struct i915_power_well *power_well)
{ … }

static void
icl_aux_power_well_disable(struct drm_i915_private *dev_priv,
			   struct i915_power_well *power_well)
{ … }

/*
 * We should only use the power well if we explicitly asked the hardware to
 * enable it, so check if it's enabled and also check if we've requested it to
 * be enabled.
 */
static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
				   struct i915_power_well *power_well)
{ … }

static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
{ … }

static void assert_can_disable_dc9(struct drm_i915_private *dev_priv)
{ … }

static void gen9_write_dc_state(struct drm_i915_private *dev_priv,
				u32 state)
{ … }

static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
{ … }

void gen9_sanitize_dc_state(struct drm_i915_private *i915)
{ … }

/**
 * gen9_set_dc_state - set target display C power state
 * @dev_priv: i915 device instance
 * @state: target DC power state
 * - DC_STATE_DISABLE
 * - DC_STATE_EN_UPTO_DC5
 * - DC_STATE_EN_UPTO_DC6
 * - DC_STATE_EN_DC9
 *
 * Signal to DMC firmware/HW the target DC power state passed in @state.
 * DMC/HW can turn off individual display clocks and power rails when entering
 * a deeper DC power state (higher in number) and turns these back when exiting
 * that state to a shallower power state (lower in number). The HW will decide
 * when to actually enter a given state on an on-demand basis, for instance
 * depending on the active state of display pipes. The state of display
 * registers backed by affected power rails are saved/restored as needed.
 *
 * Based on the above enabling a deeper DC power state is asynchronous wrt.
 * enabling it. Disabling a deeper power state is synchronous: for instance
 * setting %DC_STATE_DISABLE won't complete until all HW resources are turned
 * back on and register state is restored. This is guaranteed by the MMIO write
 * to DC_STATE_EN blocking until the state is restored.
 */
void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state)
{ … }

static void tgl_enable_dc3co(struct drm_i915_private *dev_priv)
{ … }

static void tgl_disable_dc3co(struct drm_i915_private *dev_priv)
{ … }

static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
{ … }

void gen9_enable_dc5(struct drm_i915_private *dev_priv)
{ … }

static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
{ … }

void skl_enable_dc6(struct drm_i915_private *dev_priv)
{ … }

void bxt_enable_dc9(struct drm_i915_private *dev_priv)
{ … }

void bxt_disable_dc9(struct drm_i915_private *dev_priv)
{ … }

static void hsw_power_well_sync_hw(struct drm_i915_private *dev_priv,
				   struct i915_power_well *power_well)
{ … }

static void bxt_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void bxt_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv,
					    struct i915_power_well *power_well)
{ … }

static bool bxt_dpio_cmn_power_well_enabled(struct drm_i915_private *dev_priv,
					    struct i915_power_well *power_well)
{ … }

static void bxt_verify_dpio_phy_power_wells(struct drm_i915_private *dev_priv)
{ … }

static bool gen9_dc_off_power_well_enabled(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)
{ … }

void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
{ … }

static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void i9xx_power_well_sync_hw_noop(struct drm_i915_private *dev_priv,
					 struct i915_power_well *power_well)
{ … }

static void i9xx_always_on_power_well_noop(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static bool i9xx_always_on_power_well_enabled(struct drm_i915_private *dev_priv,
					     struct i915_power_well *power_well)
{ … }

static void i830_pipes_power_well_enable(struct drm_i915_private *dev_priv,
					 struct i915_power_well *power_well)
{ … }

static void i830_pipes_power_well_disable(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static bool i830_pipes_power_well_enabled(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void i830_pipes_power_well_sync_hw(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void vlv_set_power_well(struct drm_i915_private *dev_priv,
			       struct i915_power_well *power_well, bool enable)
{ … }

static void vlv_power_well_enable(struct drm_i915_private *dev_priv,
				  struct i915_power_well *power_well)
{ … }

static void vlv_power_well_disable(struct drm_i915_private *dev_priv,
				   struct i915_power_well *power_well)
{ … }

static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv,
				   struct i915_power_well *power_well)
{ … }

static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)
{ … }

static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
{ … }

static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
{ … }

static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void vlv_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv,
					    struct i915_power_well *power_well)
{ … }

#define BITS_SET …

static void assert_chv_phy_status(struct drm_i915_private *dev_priv)
{ … }

#undef BITS_SET

static void chv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static void chv_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv,
					    struct i915_power_well *power_well)
{ … }

static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum dpio_phy phy,
				     enum dpio_channel ch, bool override, unsigned int mask)
{ … }

bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
			  enum dpio_channel ch, bool override)
{ … }

void chv_phy_powergate_lanes(struct intel_encoder *encoder,
			     bool override, unsigned int mask)
{ … }

static bool chv_pipe_power_well_enabled(struct drm_i915_private *dev_priv,
					struct i915_power_well *power_well)
{ … }

static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
				    struct i915_power_well *power_well,
				    bool enable)
{ … }

static void chv_pipe_power_well_sync_hw(struct drm_i915_private *dev_priv,
					struct i915_power_well *power_well)
{ … }

static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
				       struct i915_power_well *power_well)
{ … }

static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
					struct i915_power_well *power_well)
{ … }

static void
tgl_tc_cold_request(struct drm_i915_private *i915, bool block)
{ … }

static void
tgl_tc_cold_off_power_well_enable(struct drm_i915_private *i915,
				  struct i915_power_well *power_well)
{ … }

static void
tgl_tc_cold_off_power_well_disable(struct drm_i915_private *i915,
				   struct i915_power_well *power_well)
{ … }

static void
tgl_tc_cold_off_power_well_sync_hw(struct drm_i915_private *i915,
				   struct i915_power_well *power_well)
{ … }

static bool
tgl_tc_cold_off_power_well_is_enabled(struct drm_i915_private *dev_priv,
				      struct i915_power_well *power_well)
{ … }

static void xelpdp_aux_power_well_enable(struct drm_i915_private *dev_priv,
					 struct i915_power_well *power_well)
{ … }

static void xelpdp_aux_power_well_disable(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static bool xelpdp_aux_power_well_enabled(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void xe2lpd_pica_power_well_enable(struct drm_i915_private *dev_priv,
					  struct i915_power_well *power_well)
{ … }

static void xe2lpd_pica_power_well_disable(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

static bool xe2lpd_pica_power_well_enabled(struct drm_i915_private *dev_priv,
					   struct i915_power_well *power_well)
{ … }

const struct i915_power_well_ops i9xx_always_on_power_well_ops = …;

const struct i915_power_well_ops chv_pipe_power_well_ops = …;

const struct i915_power_well_ops chv_dpio_cmn_power_well_ops = …;

const struct i915_power_well_ops i830_pipes_power_well_ops = …;

static const struct i915_power_well_regs hsw_power_well_regs = …;

const struct i915_power_well_ops hsw_power_well_ops = …;

const struct i915_power_well_ops gen9_dc_off_power_well_ops = …;

const struct i915_power_well_ops bxt_dpio_cmn_power_well_ops = …;

const struct i915_power_well_ops vlv_display_power_well_ops = …;

const struct i915_power_well_ops vlv_dpio_cmn_power_well_ops = …;

const struct i915_power_well_ops vlv_dpio_power_well_ops = …;

static const struct i915_power_well_regs icl_aux_power_well_regs = …;

const struct i915_power_well_ops icl_aux_power_well_ops = …;

static const struct i915_power_well_regs icl_ddi_power_well_regs = …;

const struct i915_power_well_ops icl_ddi_power_well_ops = …;

const struct i915_power_well_ops tgl_tc_cold_off_ops = …;

const struct i915_power_well_ops xelpdp_aux_power_well_ops = …;

const struct i915_power_well_ops xe2lpd_pica_power_well_ops = …;
linux/drivers/gpu/drm/i915/display/intel_display_power_well.c
