// SPDX-License-Identifier: GPL-2.0+ /* * OWL SoC's Pinctrl definitions * * Copyright (c) 2014 Actions Semi Inc. * Author: David Liu <[email protected]> * * Copyright (c) 2018 Linaro Ltd. * Author: Manivannan Sadhasivam <[email protected]> */ #ifndef __PINCTRL_OWL_H__ #define __PINCTRL_OWL_H__ #define OWL_PINCONF_SLEW_SLOW … #define OWL_PINCONF_SLEW_FAST … #define MUX_PG(group_name, reg, shift, width) … #define DRV_PG(group_name, reg, shift, width) … #define SR_PG(group_name, reg, shift, width) … #define FUNCTION(fname) … /* PAD PULL UP/DOWN CONFIGURES */ #define PULLCTL_CONF(pull_reg, pull_sft, pull_wdt) … #define PAD_PULLCTL_CONF(pad_name, pull_reg, pull_sft, pull_wdt) … #define ST_CONF(st_reg, st_sft, st_wdt) … #define PAD_ST_CONF(pad_name, st_reg, st_sft, st_wdt) … #define PAD_INFO(name) … #define PAD_INFO_ST(name) … #define PAD_INFO_PULLCTL(name) … #define PAD_INFO_PULLCTL_ST(name) … #define OWL_GPIO_PORT_A … #define OWL_GPIO_PORT_B … #define OWL_GPIO_PORT_C … #define OWL_GPIO_PORT_D … #define OWL_GPIO_PORT_E … #define OWL_GPIO_PORT_F … #define OWL_GPIO_PORT(port, base, count, _outen, _inen, _dat, _intc_ctl,\ _intc_pd, _intc_msk, _intc_type, _share) … enum owl_pinconf_drv { … }; /* GPIO CTRL Bit Definition */ #define OWL_GPIO_CTLR_PENDING … #define OWL_GPIO_CTLR_ENABLE … #define OWL_GPIO_CTLR_SAMPLE_CLK_24M … /* GPIO TYPE Bit Definition */ #define OWL_GPIO_INT_LEVEL_HIGH … #define OWL_GPIO_INT_LEVEL_LOW … #define OWL_GPIO_INT_EDGE_RISING … #define OWL_GPIO_INT_EDGE_FALLING … #define OWL_GPIO_INT_MASK … /** * struct owl_pullctl - Actions pad pull control register * @reg: offset to the pull control register * @shift: shift value of the register * @width: width of the register */ struct owl_pullctl { … }; /** * struct owl_st - Actions pad schmitt trigger enable register * @reg: offset to the schmitt trigger enable register * @shift: shift value of the register * @width: width of the register */ struct owl_st { … }; /** * struct owl_pingroup - Actions pingroup definition * @name: name of the pin group * @pads: list of pins assigned to this pingroup * @npads: size of @pads array * @funcs: list of pinmux functions for this pingroup * @nfuncs: size of @funcs array * @mfpctl_reg: multiplexing control register offset * @mfpctl_shift: multiplexing control register bit mask * @mfpctl_width: multiplexing control register width * @drv_reg: drive control register offset * @drv_shift: drive control register bit mask * @drv_width: driver control register width * @sr_reg: slew rate control register offset * @sr_shift: slew rate control register bit mask * @sr_width: slew rate control register width */ struct owl_pingroup { … }; /** * struct owl_padinfo - Actions pinctrl pad info * @pad: pad name of the SoC * @pullctl: pull control register info * @st: schmitt trigger register info */ struct owl_padinfo { … }; /** * struct owl_pinmux_func - Actions pinctrl mux functions * @name: name of the pinmux function. * @groups: array of pin groups that may select this function. * @ngroups: number of entries in @groups. */ struct owl_pinmux_func { … }; /** * struct owl_gpio_port - Actions GPIO port info * @offset: offset of the GPIO port. * @pins: number of pins belongs to the GPIO port. * @outen: offset of the output enable register. * @inen: offset of the input enable register. * @dat: offset of the data register. * @intc_ctl: offset of the interrupt control register. * @intc_pd: offset of the interrupt pending register. * @intc_msk: offset of the interrupt mask register. * @intc_type: offset of the interrupt type register. */ struct owl_gpio_port { … }; /** * struct owl_pinctrl_soc_data - Actions pin controller driver configuration * @pins: array describing all pins of the pin controller. * @npins: number of entries in @pins. * @functions: array describing all mux functions of this SoC. * @nfunction: number of entries in @functions. * @groups: array describing all pin groups of this SoC. * @ngroups: number of entries in @groups. * @padinfo: array describing the pad info of this SoC. * @ngpios: number of pingroups the driver should expose as GPIOs. * @ports: array describing all GPIO ports of this SoC. * @nports: number of GPIO ports in this SoC. */ struct owl_pinctrl_soc_data { … }; int owl_pinctrl_probe(struct platform_device *pdev, struct owl_pinctrl_soc_data *soc_data); #endif /* __PINCTRL_OWL_H__ */
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