linux/drivers/pinctrl/actions/pinctrl-owl.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * OWL SoC's Pinctrl driver
 *
 * Copyright (c) 2014 Actions Semi Inc.
 * Author: David Liu <[email protected]>
 *
 * Copyright (c) 2018 Linaro Ltd.
 * Author: Manivannan Sadhasivam <[email protected]>
 */

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/spinlock.h>

#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include "../core.h"
#include "../pinctrl-utils.h"
#include "pinctrl-owl.h"

/**
 * struct owl_pinctrl - pinctrl state of the device
 * @dev: device handle
 * @pctrldev: pinctrl handle
 * @chip: gpio chip
 * @lock: spinlock to protect registers
 * @clk: clock control
 * @soc: reference to soc_data
 * @base: pinctrl register base address
 * @num_irq: number of possible interrupts
 * @irq: interrupt numbers
 */
struct owl_pinctrl { … };

static void owl_update_bits(void __iomem *base, u32 mask, u32 val)
{ … }

static u32 owl_read_field(struct owl_pinctrl *pctrl, u32 reg,
				u32 bit, u32 width)
{ … }

static void owl_write_field(struct owl_pinctrl *pctrl, u32 reg, u32 arg,
				u32 bit, u32 width)
{ … }

static int owl_get_groups_count(struct pinctrl_dev *pctrldev)
{ … }

static const char *owl_get_group_name(struct pinctrl_dev *pctrldev,
				unsigned int group)
{ … }

static int owl_get_group_pins(struct pinctrl_dev *pctrldev,
				unsigned int group,
				const unsigned int **pins,
				unsigned int *num_pins)
{ … }

static void owl_pin_dbg_show(struct pinctrl_dev *pctrldev,
				struct seq_file *s,
				unsigned int offset)
{ … }

static const struct pinctrl_ops owl_pinctrl_ops = …;

static int owl_get_funcs_count(struct pinctrl_dev *pctrldev)
{ … }

static const char *owl_get_func_name(struct pinctrl_dev *pctrldev,
				unsigned int function)
{ … }

static int owl_get_func_groups(struct pinctrl_dev *pctrldev,
				unsigned int function,
				const char * const **groups,
				unsigned int * const num_groups)
{ … }

static inline int get_group_mfp_mask_val(const struct owl_pingroup *g,
				int function,
				u32 *mask,
				u32 *val)
{ … }

static int owl_set_mux(struct pinctrl_dev *pctrldev,
				unsigned int function,
				unsigned int group)
{ … }

static const struct pinmux_ops owl_pinmux_ops = …;

static int owl_pad_pinconf_reg(const struct owl_padinfo *info,
				unsigned int param,
				u32 *reg,
				u32 *bit,
				u32 *width)
{ … }

static int owl_pin_config_get(struct pinctrl_dev *pctrldev,
				unsigned int pin,
				unsigned long *config)
{ … }

static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
				unsigned int pin,
				unsigned long *configs,
				unsigned int num_configs)
{ … }

static int owl_group_pinconf_reg(const struct owl_pingroup *g,
				unsigned int param,
				u32 *reg,
				u32 *bit,
				u32 *width)
{ … }

static int owl_group_pinconf_arg2val(const struct owl_pingroup *g,
				unsigned int param,
				u32 *arg)
{ … }

static int owl_group_pinconf_val2arg(const struct owl_pingroup *g,
				unsigned int param,
				u32 *arg)
{ … }

static int owl_group_config_get(struct pinctrl_dev *pctrldev,
				unsigned int group,
				unsigned long *config)
{ … }

static int owl_group_config_set(struct pinctrl_dev *pctrldev,
				unsigned int group,
				unsigned long *configs,
				unsigned int num_configs)
{ … }

static const struct pinconf_ops owl_pinconf_ops = …;

static struct pinctrl_desc owl_pinctrl_desc = …;

static const struct owl_gpio_port *
owl_gpio_get_port(struct owl_pinctrl *pctrl, unsigned int *pin)
{ … }

static void owl_gpio_update_reg(void __iomem *base, unsigned int pin, int flag)
{ … }

static int owl_gpio_request(struct gpio_chip *chip, unsigned int offset)
{ … }

static void owl_gpio_free(struct gpio_chip *chip, unsigned int offset)
{ … }

static int owl_gpio_get(struct gpio_chip *chip, unsigned int offset)
{ … }

static void owl_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
{ … }

static int owl_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
{ … }

static int owl_gpio_direction_output(struct gpio_chip *chip,
				unsigned int offset, int value)
{ … }

static void irq_set_type(struct owl_pinctrl *pctrl, int gpio, unsigned int type)
{ … }

static void owl_gpio_irq_mask(struct irq_data *data)
{ … }

static void owl_gpio_irq_unmask(struct irq_data *data)
{ … }

static void owl_gpio_irq_ack(struct irq_data *data)
{ … }

static int owl_gpio_irq_set_type(struct irq_data *data, unsigned int type)
{ … }

static const struct irq_chip owl_gpio_irqchip = …;

static void owl_gpio_irq_handler(struct irq_desc *desc)
{ … }

static int owl_gpio_init(struct owl_pinctrl *pctrl)
{ … }

int owl_pinctrl_probe(struct platform_device *pdev,
				struct owl_pinctrl_soc_data *soc_data)
{ … }