// SPDX-License-Identifier: GPL-2.0-only /* Copyright (C) 2016 Broadcom Corporation * * This file contains the Northstar2 IOMUX driver that supports group * based PINMUX configuration. The PWM is functional only when the * corresponding mfio pin group is selected as gpio. */ #include <linux/err.h> #include <linux/io.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> #include "../core.h" #include "../pinctrl-utils.h" #define NS2_NUM_IOMUX … #define NS2_NUM_PWM_MUX … #define NS2_PIN_MUX_BASE0 … #define NS2_PIN_MUX_BASE1 … #define NS2_PIN_CONF_BASE … #define NS2_MUX_PAD_FUNC1_OFFSET … #define NS2_PIN_SRC_MASK … #define NS2_PIN_PULL_MASK … #define NS2_PIN_DRIVE_STRENGTH_MASK … #define NS2_PIN_PULL_UP … #define NS2_PIN_PULL_DOWN … #define NS2_PIN_INPUT_EN_MASK … /* * Northstar2 IOMUX register description * * @base: base address number * @offset: register offset for mux configuration of a group * @shift: bit shift for mux configuration of a group * @mask: mask bits * @alt: alternate function to set to */ struct ns2_mux { … }; /* * Keep track of Northstar2 IOMUX configuration and prevent double * configuration * * @ns2_mux: Northstar2 IOMUX register description * @is_configured: flag to indicate whether a mux setting has already * been configured */ struct ns2_mux_log { … }; /* * Group based IOMUX configuration * * @name: name of the group * @pins: array of pins used by this group * @num_pins: total number of pins used by this group * @mux: Northstar2 group based IOMUX configuration */ struct ns2_pin_group { … }; /* * Northstar2 mux function and supported pin groups * * @name: name of the function * @groups: array of groups that can be supported by this function * @num_groups: total number of groups that can be supported by function */ struct ns2_pin_function { … }; /* * Northstar2 IOMUX pinctrl core * * @pctl: pointer to pinctrl_dev * @dev: pointer to device * @base0: first IOMUX register base * @base1: second IOMUX register base * @pinconf_base: configuration register base * @groups: pointer to array of groups * @num_groups: total number of groups * @functions: pointer to array of functions * @num_functions: total number of functions * @mux_log: pointer to the array of mux logs * @lock: lock to protect register access */ struct ns2_pinctrl { … }; /* * Pin configuration info * * @base: base address number * @offset: register offset from base * @src_shift: slew rate control bit shift in the register * @input_en: input enable control bit shift * @pull_shift: pull-up/pull-down control bit shift in the register * @drive_shift: drive strength control bit shift in the register */ struct ns2_pinconf { … }; /* * Description of a pin in Northstar2 * * @pin: pin number * @name: pin name * @pin_conf: pin configuration structure */ struct ns2_pin { … }; #define NS2_PIN_DESC(p, n, b, o, s, i, pu, d) … /* * List of pins in Northstar2 */ static struct ns2_pin ns2_pins[] = …; /* * List of groups of pins */ static const unsigned int nand_pins[] = …; static const unsigned int nor_data_pins[] = …; static const unsigned int gpio_0_1_pins[] = …; static const unsigned int pwm_0_pins[] = …; static const unsigned int pwm_1_pins[] = …; static const unsigned int uart1_ext_clk_pins[] = …; static const unsigned int nor_adv_pins[] = …; static const unsigned int gpio_2_5_pins[] = …; static const unsigned int pcie_ab1_clk_wak_pins[] = …; static const unsigned int nor_addr_0_3_pins[] = …; static const unsigned int pwm_2_pins[] = …; static const unsigned int pwm_3_pins[] = …; static const unsigned int gpio_6_7_pins[] = …; static const unsigned int pcie_a3_clk_wak_pins[] = …; static const unsigned int nor_addr_4_5_pins[] = …; static const unsigned int gpio_8_9_pins[] = …; static const unsigned int pcie_b3_clk_wak_pins[] = …; static const unsigned int nor_addr_6_7_pins[] = …; static const unsigned int gpio_10_11_pins[] = …; static const unsigned int pcie_b2_clk_wak_pins[] = …; static const unsigned int nor_addr_8_9_pins[] = …; static const unsigned int gpio_12_13_pins[] = …; static const unsigned int pcie_a2_clk_wak_pins[] = …; static const unsigned int nor_addr_10_11_pins[] = …; static const unsigned int gpio_14_17_pins[] = …; static const unsigned int uart0_modem_pins[] = …; static const unsigned int nor_addr_12_15_pins[] = …; static const unsigned int gpio_18_19_pins[] = …; static const unsigned int uart0_rts_cts_pins[] = …; static const unsigned int gpio_20_21_pins[] = …; static const unsigned int uart0_in_out_pins[] = …; static const unsigned int gpio_22_23_pins[] = …; static const unsigned int uart1_dcd_dsr_pins[] = …; static const unsigned int gpio_24_25_pins[] = …; static const unsigned int uart1_ri_dtr_pins[] = …; static const unsigned int gpio_26_27_pins[] = …; static const unsigned int uart1_rts_cts_pins[] = …; static const unsigned int gpio_28_29_pins[] = …; static const unsigned int uart1_in_out_pins[] = …; static const unsigned int gpio_30_31_pins[] = …; static const unsigned int uart2_rts_cts_pins[] = …; #define NS2_PIN_GROUP(group_name, ba, off, sh, ma, al) … /* * List of Northstar2 pin groups */ static const struct ns2_pin_group ns2_pin_groups[] = …; /* * List of groups supported by functions */ static const char * const nand_grps[] = …; static const char * const nor_grps[] = …; static const char * const gpio_grps[] = …; static const char * const pcie_grps[] = …; static const char * const uart0_grps[] = …; static const char * const uart1_grps[] = …; static const char * const uart2_grps[] = …; static const char * const pwm_grps[] = …; #define NS2_PIN_FUNCTION(func) … /* * List of supported functions */ static const struct ns2_pin_function ns2_pin_functions[] = …; static int ns2_get_groups_count(struct pinctrl_dev *pctrl_dev) { … } static const char *ns2_get_group_name(struct pinctrl_dev *pctrl_dev, unsigned int selector) { … } static int ns2_get_group_pins(struct pinctrl_dev *pctrl_dev, unsigned int selector, const unsigned int **pins, unsigned int *num_pins) { … } static void ns2_pin_dbg_show(struct pinctrl_dev *pctrl_dev, struct seq_file *s, unsigned int offset) { … } static const struct pinctrl_ops ns2_pinctrl_ops = …; static int ns2_get_functions_count(struct pinctrl_dev *pctrl_dev) { … } static const char *ns2_get_function_name(struct pinctrl_dev *pctrl_dev, unsigned int selector) { … } static int ns2_get_function_groups(struct pinctrl_dev *pctrl_dev, unsigned int selector, const char * const **groups, unsigned int * const num_groups) { … } static int ns2_pinmux_set(struct ns2_pinctrl *pinctrl, const struct ns2_pin_function *func, const struct ns2_pin_group *grp, struct ns2_mux_log *mux_log) { … } static int ns2_pinmux_enable(struct pinctrl_dev *pctrl_dev, unsigned int func_select, unsigned int grp_select) { … } static int ns2_pin_set_enable(struct pinctrl_dev *pctrldev, unsigned int pin, u16 enable) { … } static int ns2_pin_get_enable(struct pinctrl_dev *pctrldev, unsigned int pin) { … } static int ns2_pin_set_slew(struct pinctrl_dev *pctrldev, unsigned int pin, u32 slew) { … } static int ns2_pin_get_slew(struct pinctrl_dev *pctrldev, unsigned int pin, u16 *slew) { … } static int ns2_pin_set_pull(struct pinctrl_dev *pctrldev, unsigned int pin, bool pull_up, bool pull_down) { … } static void ns2_pin_get_pull(struct pinctrl_dev *pctrldev, unsigned int pin, bool *pull_up, bool *pull_down) { … } static int ns2_pin_set_strength(struct pinctrl_dev *pctrldev, unsigned int pin, u32 strength) { … } static int ns2_pin_get_strength(struct pinctrl_dev *pctrldev, unsigned int pin, u16 *strength) { … } static int ns2_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { … } static int ns2_pin_config_set(struct pinctrl_dev *pctrldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) { … } static const struct pinmux_ops ns2_pinmux_ops = …; static const struct pinconf_ops ns2_pinconf_ops = …; static struct pinctrl_desc ns2_pinctrl_desc = …; static int ns2_mux_log_init(struct ns2_pinctrl *pinctrl) { … } static int ns2_pinmux_probe(struct platform_device *pdev) { … } static const struct of_device_id ns2_pinmux_of_match[] = …; static struct platform_driver ns2_pinmux_driver = …; static int __init ns2_pinmux_init(void) { … } arch_initcall(ns2_pinmux_init);
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