linux/drivers/pinctrl/cirrus/pinctrl-lochnagar.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Lochnagar pin and GPIO control
 *
 * Copyright (c) 2017-2018 Cirrus Logic, Inc. and
 *                         Cirrus Logic International Semiconductor Ltd.
 *
 * Author: Charles Keepax <[email protected]>
 */

#include <linux/err.h>
#include <linux/errno.h>
#include <linux/gpio/driver.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include <linux/mfd/lochnagar.h>
#include <linux/mfd/lochnagar1_regs.h>
#include <linux/mfd/lochnagar2_regs.h>

#include <dt-bindings/pinctrl/lochnagar.h>

#include "../pinctrl-utils.h"

#define LN2_NUM_GPIO_CHANNELS …

#define LN_CDC_AIF1_STR …
#define LN_CDC_AIF2_STR …
#define LN_CDC_AIF3_STR …
#define LN_DSP_AIF1_STR …
#define LN_DSP_AIF2_STR …
#define LN_PSIA1_STR …
#define LN_PSIA2_STR …
#define LN_GF_AIF1_STR …
#define LN_GF_AIF2_STR …
#define LN_GF_AIF3_STR …
#define LN_GF_AIF4_STR …
#define LN_SPDIF_AIF_STR …
#define LN_USB_AIF1_STR …
#define LN_USB_AIF2_STR …
#define LN_ADAT_AIF_STR …
#define LN_SOUNDCARD_AIF_STR …

#define LN_PIN_GPIO(REV, ID, NAME, REG, SHIFT, INVERT) …

#define LN_PIN_SAIF(REV, ID, NAME) …

#define LN_PIN_AIF(REV, ID) …

#define LN1_PIN_GPIO(ID, NAME, REG, SHIFT, INVERT) …

#define LN1_PIN_MUX(ID, NAME) …

#define LN1_PIN_AIF(ID) …

#define LN2_PIN_GPIO(ID, NAME, REG, SHIFT, INVERT) …

#define LN2_PIN_MUX(ID, NAME) …

#define LN2_PIN_AIF(ID) …

#define LN2_PIN_GAI(ID) …

#define LN_PIN(REV, ID) …

#define LN1_PIN(ID) …
#define LN2_PIN(ID) …

#define LN_PINS(REV, ID) …

#define LN1_PINS(ID) …
#define LN2_PINS(ID) …

enum { … };

enum lochnagar_pin_type { … };

struct lochnagar_pin { … };

LN1_PIN_GPIO(…);
LN1_PIN_GPIO(…);
LN1_PIN_GPIO(…);
LN1_PIN_MUX(…);
LN1_PIN_MUX(…);
LN1_PIN_MUX(…);
LN1_PIN_MUX(…);
LN1_PIN_MUX(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);
LN1_PIN_AIF(…);

LN2_PIN_GPIO(…);
LN2_PIN_GPIO(…);
LN2_PIN_GPIO(…);
LN2_PIN_GPIO(…);
LN2_PIN_GPIO(…);
LN2_PIN_GPIO(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_MUX(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_GAI(…);
LN2_PIN_AIF(…);
LN2_PIN_AIF(…);
LN2_PIN_AIF(…);
LN2_PIN_AIF(…);
LN2_PIN_AIF(…);

static const struct pinctrl_pin_desc lochnagar1_pins[] = …;

static const struct pinctrl_pin_desc lochnagar2_pins[] = …;

#define LN_AIF_PINS(REV, ID) …

#define LN1_AIF(ID, CTRL) …

#define LN2_AIF(ID) …

struct lochnagar_aif { … };

LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);
LN1_AIF(…);

LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);
LN2_AIF(…);

#define LN2_OP_AIF …
#define LN2_OP_GPIO …

#define LN_FUNC(NAME, TYPE, OP) …

#define LN_FUNC_PIN(REV, ID, OP) …

#define LN1_FUNC_PIN(ID, OP) …
#define LN2_FUNC_PIN(ID, OP) …

#define LN_FUNC_AIF(REV, ID, OP) …

#define LN1_FUNC_AIF(ID, OP) …
#define LN2_FUNC_AIF(ID, OP) …

#define LN2_FUNC_GAI(ID, OP, BOP, LROP, RXOP, TXOP) …

enum lochnagar_func_type { … };

struct lochnagar_func { … };

static const struct lochnagar_func lochnagar1_funcs[] = …;

static const struct lochnagar_func lochnagar2_funcs[] = …;

#define LN_GROUP_PIN(REV, ID) …

#define LN_GROUP_AIF(REV, ID) …

#define LN1_GROUP_PIN(ID) …
#define LN2_GROUP_PIN(ID) …

#define LN1_GROUP_AIF(ID) …
#define LN2_GROUP_AIF(ID) …

#define LN2_GROUP_GAI(ID) …

struct lochnagar_group { … };

static const struct lochnagar_group lochnagar1_groups[] = …;

static const struct lochnagar_group lochnagar2_groups[] = …;

struct lochnagar_func_groups { … };

struct lochnagar_pin_priv { … };

static int lochnagar_get_groups_count(struct pinctrl_dev *pctldev)
{ … }

static const char *lochnagar_get_group_name(struct pinctrl_dev *pctldev,
					    unsigned int group_idx)
{ … }

static int lochnagar_get_group_pins(struct pinctrl_dev *pctldev,
				    unsigned int group_idx,
				    const unsigned int **pins,
				    unsigned int *num_pins)
{ … }

static const struct pinctrl_ops lochnagar_pin_group_ops = …;

static int lochnagar_get_funcs_count(struct pinctrl_dev *pctldev)
{ … }

static const char *lochnagar_get_func_name(struct pinctrl_dev *pctldev,
					   unsigned int func_idx)
{ … }

static int lochnagar_get_func_groups(struct pinctrl_dev *pctldev,
				     unsigned int func_idx,
				     const char * const **groups,
				     unsigned int * const num_groups)
{ … }

static int lochnagar2_get_gpio_chan(struct lochnagar_pin_priv *priv,
				    unsigned int op)
{ … }

static int lochnagar_pin_set_mux(struct lochnagar_pin_priv *priv,
				 const struct lochnagar_pin *pin,
				 unsigned int op)
{ … }

static int lochnagar_aif_set_mux(struct lochnagar_pin_priv *priv,
				 const struct lochnagar_group *group,
				 unsigned int op)
{ … }

static int lochnagar_set_mux(struct pinctrl_dev *pctldev,
			     unsigned int func_idx, unsigned int group_idx)
{ … }

static int lochnagar_gpio_request(struct pinctrl_dev *pctldev,
				  struct pinctrl_gpio_range *range,
				  unsigned int offset)
{ … }

static int lochnagar_gpio_set_direction(struct pinctrl_dev *pctldev,
					struct pinctrl_gpio_range *range,
					unsigned int offset,
					bool input)
{ … }

static const struct pinmux_ops lochnagar_pin_mux_ops = …;

static int lochnagar_aif_set_master(struct lochnagar_pin_priv *priv,
				    unsigned int group_idx, bool master)
{ … }

static int lochnagar_conf_group_set(struct pinctrl_dev *pctldev,
				    unsigned int group_idx,
				    unsigned long *configs,
				    unsigned int num_configs)
{ … }

static const struct pinconf_ops lochnagar_pin_conf_ops = …;

static const struct pinctrl_desc lochnagar_pin_desc = …;

static void lochnagar_gpio_set(struct gpio_chip *chip,
			       unsigned int offset, int value)
{ … }

static int lochnagar_gpio_direction_out(struct gpio_chip *chip,
					unsigned int offset, int value)
{ … }

static int lochnagar_fill_func_groups(struct lochnagar_pin_priv *priv)
{ … }

static int lochnagar_pin_probe(struct platform_device *pdev)
{ … }

static const struct of_device_id lochnagar_of_match[] = …;
MODULE_DEVICE_TABLE(of, lochnagar_of_match);

static struct platform_driver lochnagar_pin_driver = …;
module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;