// SPDX-License-Identifier: GPL-2.0 /* * Pinctrl GPIO driver for Intel Baytrail * * Copyright (c) 2012-2013, Intel Corporation * Author: Mathias Nyman <[email protected]> */ #include <linux/acpi.h> #include <linux/array_size.h> #include <linux/bitops.h> #include <linux/cleanup.h> #include <linux/gpio/driver.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> #include <linux/types.h> #include <linux/platform_device.h> #include <linux/pm.h> #include <linux/property.h> #include <linux/seq_file.h> #include <linux/string_helpers.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinconf-generic.h> #include "pinctrl-intel.h" /* memory mapped register offsets */ #define BYT_CONF0_REG … #define BYT_CONF1_REG … #define BYT_VAL_REG … #define BYT_DFT_REG … #define BYT_INT_STAT_REG … #define BYT_DIRECT_IRQ_REG … #define BYT_DEBOUNCE_REG … /* BYT_CONF0_REG register bits */ #define BYT_IODEN … #define BYT_DIRECT_IRQ_EN … #define BYT_TRIG_MASK … #define BYT_TRIG_NEG … #define BYT_TRIG_POS … #define BYT_TRIG_LVL … #define BYT_DEBOUNCE_EN … #define BYT_GLITCH_FILTER_EN … #define BYT_GLITCH_F_SLOW_CLK … #define BYT_GLITCH_F_FAST_CLK … #define BYT_PULL_STR_SHIFT … #define BYT_PULL_STR_MASK … #define BYT_PULL_STR_2K … #define BYT_PULL_STR_10K … #define BYT_PULL_STR_20K … #define BYT_PULL_STR_40K … #define BYT_PULL_ASSIGN_MASK … #define BYT_PULL_ASSIGN_DOWN … #define BYT_PULL_ASSIGN_UP … #define BYT_PIN_MUX … /* BYT_VAL_REG register bits */ #define BYT_DIR_MASK … #define BYT_INPUT_EN … #define BYT_OUTPUT_EN … #define BYT_LEVEL … #define BYT_CONF0_RESTORE_MASK … #define BYT_VAL_RESTORE_MASK … /* BYT_DEBOUNCE_REG bits */ #define BYT_DEBOUNCE_PULSE_MASK … #define BYT_DEBOUNCE_PULSE_375US … #define BYT_DEBOUNCE_PULSE_750US … #define BYT_DEBOUNCE_PULSE_1500US … #define BYT_DEBOUNCE_PULSE_3MS … #define BYT_DEBOUNCE_PULSE_6MS … #define BYT_DEBOUNCE_PULSE_12MS … #define BYT_DEBOUNCE_PULSE_24MS … #define BYT_NGPIO_SCORE … #define BYT_NGPIO_NCORE … #define BYT_NGPIO_SUS … #define BYT_SCORE_ACPI_UID … #define BYT_NCORE_ACPI_UID … #define BYT_SUS_ACPI_UID … /* * This is the function value most pins have for GPIO muxing. If the value * differs from the default one, it must be explicitly mentioned. Otherwise, the * pin control implementation will set the muxing value to default GPIO if it * does not find a match for the requested function. */ #define BYT_DEFAULT_GPIO_MUX … #define BYT_ALTER_GPIO_MUX … struct intel_pad_context { … }; #define COMMUNITY(p, n, map) … /* SCORE pins, aka GPIOC_<pin_no> or GPIO_S0_SC[<pin_no>] */ static const struct pinctrl_pin_desc byt_score_pins[] = …; static const unsigned int byt_score_pins_map[BYT_NGPIO_SCORE] = …; /* SCORE groups */ static const unsigned int byt_score_uart1_pins[] = …; static const unsigned int byt_score_uart2_pins[] = …; static const unsigned int byt_score_uart3_pins[] = …; static const unsigned int byt_score_pwm0_pins[] = …; static const unsigned int byt_score_pwm1_pins[] = …; static const unsigned int byt_score_sio_spi_pins[] = …; static const unsigned int byt_score_i2c5_pins[] = …; static const unsigned int byt_score_i2c6_pins[] = …; static const unsigned int byt_score_i2c4_pins[] = …; static const unsigned int byt_score_i2c3_pins[] = …; static const unsigned int byt_score_i2c2_pins[] = …; static const unsigned int byt_score_i2c1_pins[] = …; static const unsigned int byt_score_i2c0_pins[] = …; static const unsigned int byt_score_ssp0_pins[] = …; static const unsigned int byt_score_ssp1_pins[] = …; static const unsigned int byt_score_ssp2_pins[] = …; static const unsigned int byt_score_sdcard_pins[] = …; static const unsigned int byt_score_sdcard_mux_values[] = …; static const unsigned int byt_score_sdio_pins[] = …; static const unsigned int byt_score_emmc_pins[] = …; static const unsigned int byt_score_ilb_lpc_pins[] = …; static const unsigned int byt_score_sata_pins[] = …; static const unsigned int byt_score_plt_clk0_pins[] = …; static const unsigned int byt_score_plt_clk1_pins[] = …; static const unsigned int byt_score_plt_clk2_pins[] = …; static const unsigned int byt_score_plt_clk3_pins[] = …; static const unsigned int byt_score_plt_clk4_pins[] = …; static const unsigned int byt_score_plt_clk5_pins[] = …; static const unsigned int byt_score_smbus_pins[] = …; static const struct intel_pingroup byt_score_groups[] = …; static const char * const byt_score_uart_groups[] = …; static const char * const byt_score_pwm_groups[] = …; static const char * const byt_score_ssp_groups[] = …; static const char * const byt_score_spi_groups[] = …; static const char * const byt_score_i2c_groups[] = …; static const char * const byt_score_sdcard_groups[] = …; static const char * const byt_score_sdio_groups[] = …; static const char * const byt_score_emmc_groups[] = …; static const char * const byt_score_lpc_groups[] = …; static const char * const byt_score_sata_groups[] = …; static const char * const byt_score_plt_clk_groups[] = …; static const char * const byt_score_smbus_groups[] = …; static const char * const byt_score_gpio_groups[] = …; static const struct intel_function byt_score_functions[] = …; static const struct intel_community byt_score_communities[] = …; static const struct intel_pinctrl_soc_data byt_score_soc_data = …; /* SUS pins, aka GPIOS_<pin_no> or GPIO_S5[<pin_no>] */ static const struct pinctrl_pin_desc byt_sus_pins[] = …; static const unsigned int byt_sus_pins_map[BYT_NGPIO_SUS] = …; static const unsigned int byt_sus_usb_over_current_pins[] = …; static const unsigned int byt_sus_usb_over_current_mode_values[] = …; static const unsigned int byt_sus_usb_over_current_gpio_mode_values[] = …; static const unsigned int byt_sus_usb_ulpi_pins[] = …; static const unsigned int byt_sus_usb_ulpi_mode_values[] = …; static const unsigned int byt_sus_usb_ulpi_gpio_mode_values[] = …; static const unsigned int byt_sus_pcu_spi_pins[] = …; static const unsigned int byt_sus_pcu_spi_mode_values[] = …; static const unsigned int byt_sus_pcu_spi_gpio_mode_values[] = …; static const unsigned int byt_sus_pmu_clk1_pins[] = …; static const unsigned int byt_sus_pmu_clk2_pins[] = …; static const struct intel_pingroup byt_sus_groups[] = …; static const char * const byt_sus_usb_groups[] = …; static const char * const byt_sus_spi_groups[] = …; static const char * const byt_sus_pmu_clk_groups[] = …; static const char * const byt_sus_gpio_groups[] = …; static const struct intel_function byt_sus_functions[] = …; static const struct intel_community byt_sus_communities[] = …; static const struct intel_pinctrl_soc_data byt_sus_soc_data = …; static const struct pinctrl_pin_desc byt_ncore_pins[] = …; static const unsigned int byt_ncore_pins_map[BYT_NGPIO_NCORE] = …; static const struct intel_community byt_ncore_communities[] = …; static const struct intel_pinctrl_soc_data byt_ncore_soc_data = …; static const struct intel_pinctrl_soc_data *byt_soc_data[] = …; static DEFINE_RAW_SPINLOCK(byt_lock); static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset, int reg) { … } static const struct pinctrl_ops byt_pinctrl_ops = …; static void byt_set_group_simple_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, unsigned int func) { … } static void byt_set_group_mixed_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, const unsigned int *func) { … } static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, unsigned int group_selector) { … } static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset) { … } static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset) { … } static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { … } static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { … } static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg, unsigned int offset) { … } static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) { … } static const struct pinmux_ops byt_pinmux_ops = …; static void byt_get_pull_strength(u32 reg, u16 *strength) { … } static int byt_set_pull_strength(u32 *reg, u16 strength) { … } static void byt_gpio_force_input_mode(struct intel_pinctrl *vg, unsigned int offset) { … } static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset, unsigned long *config) { … } static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, unsigned int offset, unsigned long *configs, unsigned int num_configs) { … } static const struct pinconf_ops byt_pinconf_ops = …; static const struct pinctrl_desc byt_pinctrl_desc = …; static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset) { … } static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { … } static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { … } static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { … } /* * Note despite the temptation this MUST NOT be converted into a call to * pinctrl_gpio_direction_output() + byt_gpio_set() that does not work this * MUST be done as a single BYT_VAL_REG register write. * See the commit message of the commit adding this comment for details. */ static int byt_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { … } static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) { … } static const struct gpio_chip byt_gpio_chip = …; static void byt_irq_ack(struct irq_data *d) { … } static void byt_irq_mask(struct irq_data *d) { … } static void byt_irq_unmask(struct irq_data *d) { … } static int byt_irq_type(struct irq_data *d, unsigned int type) { … } static const struct irq_chip byt_gpio_irq_chip = …; static void byt_gpio_irq_handler(struct irq_desc *desc) { … } static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 conf0) { … } static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) { … } static int byt_gpio_irq_init_hw(struct gpio_chip *chip) { … } static int byt_gpio_add_pin_ranges(struct gpio_chip *chip) { … } static int byt_gpio_probe(struct intel_pinctrl *vg) { … } static int byt_set_soc_data(struct intel_pinctrl *vg, const struct intel_pinctrl_soc_data *soc) { … } static const struct acpi_device_id byt_gpio_acpi_match[] = …; static int byt_pinctrl_probe(struct platform_device *pdev) { … } static int byt_gpio_suspend(struct device *dev) { … } static int byt_gpio_resume(struct device *dev) { … } static const struct dev_pm_ops byt_gpio_pm_ops = …; static struct platform_driver byt_gpio_driver = …; static int __init byt_gpio_init(void) { … } subsys_initcall(byt_gpio_init); MODULE_IMPORT_NS(…);
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