intel_fb.c | Explore in Territory

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2021 Intel Corporation
 */

#include <drm/drm_blend.h>
#include <drm/drm_modeset_helper.h>

#include <linux/dma-fence.h>
#include <linux/dma-resv.h>

#include "gem/i915_gem_object.h"
#include "i915_drv.h"
#include "intel_atomic_plane.h"
#include "intel_display.h"
#include "intel_display_types.h"
#include "intel_dpt.h"
#include "intel_fb.h"
#include "intel_fb_bo.h"
#include "intel_frontbuffer.h"

#define check_array_bounds(i915, a, i) …

/*
 * From the Sky Lake PRM:
 * "The Color Control Surface (CCS) contains the compression status of
 *  the cache-line pairs. The compression state of the cache-line pair
 *  is specified by 2 bits in the CCS. Each CCS cache-line represents
 *  an area on the main surface of 16 x16 sets of 128 byte Y-tiled
 *  cache-line-pairs. CCS is always Y tiled."
 *
 * Since cache line pairs refers to horizontally adjacent cache lines,
 * each cache line in the CCS corresponds to an area of 32x16 cache
 * lines on the main surface. Since each pixel is 4 bytes, this gives
 * us a ratio of one byte in the CCS for each 8x16 pixels in the
 * main surface.
 */
static const struct drm_format_info skl_ccs_formats[] = …;

/*
 * Gen-12 compression uses 4 bits of CCS data for each cache line pair in the
 * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
 * in the main surface. With 4 byte pixels and each Y-tile having dimensions of
 * 32x32 pixels, the ratio turns out to 1B in the CCS for every 2x32 pixels in
 * the main surface.
 */
static const struct drm_format_info gen12_ccs_formats[] = …;

/*
 * Same as gen12_ccs_formats[] above, but with additional surface used
 * to pass Clear Color information in plane 2 with 64 bits of data.
 */
static const struct drm_format_info gen12_ccs_cc_formats[] = …;

static const struct drm_format_info gen12_flat_ccs_cc_formats[] = …;

struct intel_modifier_desc { … };

#define INTEL_PLANE_CAP_CCS_MASK …
#define INTEL_PLANE_CAP_TILING_MASK …
#define INTEL_PLANE_CAP_TILING_NONE …

static const struct intel_modifier_desc intel_modifiers[] = …;

static const struct intel_modifier_desc *lookup_modifier_or_null(u64 modifier)
{ … }

static const struct intel_modifier_desc *lookup_modifier(u64 modifier)
{ … }

static const struct drm_format_info *
lookup_format_info(const struct drm_format_info formats[],
		   int num_formats, u32 format)
{ … }

unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
{ … }

/**
 * intel_fb_get_format_info: Get a modifier specific format information
 * @cmd: FB add command structure
 *
 * Returns:
 * Returns the format information for @cmd->pixel_format specific to @cmd->modifier[0],
 * or %NULL if the modifier doesn't override the format.
 */
const struct drm_format_info *
intel_fb_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
{ … }

static bool plane_caps_contain_any(u8 caps, u8 mask)
{ … }

static bool plane_caps_contain_all(u8 caps, u8 mask)
{ … }

/**
 * intel_fb_is_tiled_modifier: Check if a modifier is a tiled modifier type
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier is a tiled modifier.
 */
bool intel_fb_is_tiled_modifier(u64 modifier)
{ … }

/**
 * intel_fb_is_ccs_modifier: Check if a modifier is a CCS modifier type
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier is a render, render with color clear or
 * media compression modifier.
 */
bool intel_fb_is_ccs_modifier(u64 modifier)
{ … }

/**
 * intel_fb_is_rc_ccs_cc_modifier: Check if a modifier is an RC CCS CC modifier type
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier is a render with color clear modifier.
 */
bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier)
{ … }

/**
 * intel_fb_is_mc_ccs_modifier: Check if a modifier is an MC CCS modifier type
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier is a media compression modifier.
 */
bool intel_fb_is_mc_ccs_modifier(u64 modifier)
{ … }

/**
 * intel_fb_needs_64k_phys: Check if modifier requires 64k physical placement.
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier requires 64k aligned physical pages.
 */
bool intel_fb_needs_64k_phys(u64 modifier)
{ … }

/**
 * intel_fb_is_tile4_modifier: Check if a modifier is a tile4 modifier type
 * @modifier: Modifier to check
 *
 * Returns:
 * Returns %true if @modifier is a tile4 modifier.
 */
bool intel_fb_is_tile4_modifier(u64 modifier)
{ … }

static bool check_modifier_display_ver_range(const struct intel_modifier_desc *md,
					     u8 display_ver_from, u8 display_ver_until)
{ … }

static bool plane_has_modifier(struct drm_i915_private *i915,
			       u8 plane_caps,
			       const struct intel_modifier_desc *md)
{ … }

/**
 * intel_fb_plane_get_modifiers: Get the modifiers for the given platform and plane capabilities
 * @i915: i915 device instance
 * @plane_caps: capabilities for the plane the modifiers are queried for
 *
 * Returns:
 * Returns the list of modifiers allowed by the @i915 platform and @plane_caps.
 * The caller must free the returned buffer.
 */
u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
				  u8 plane_caps)
{ … }

/**
 * intel_fb_plane_supports_modifier: Determine if a modifier is supported by the given plane
 * @plane: Plane to check the modifier support for
 * @modifier: The modifier to check the support for
 *
 * Returns:
 * %true if the @modifier is supported on @plane.
 */
bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier)
{ … }

static bool format_is_yuv_semiplanar(const struct intel_modifier_desc *md,
				     const struct drm_format_info *info)
{ … }

/**
 * intel_format_info_is_yuv_semiplanar: Check if the given format is YUV semiplanar
 * @info: format to check
 * @modifier: modifier used with the format
 *
 * Returns:
 * %true if @info / @modifier is YUV semiplanar.
 */
bool intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
					 u64 modifier)
{ … }

static u8 ccs_aux_plane_mask(const struct intel_modifier_desc *md,
			     const struct drm_format_info *format)
{ … }

/**
 * intel_fb_is_ccs_aux_plane: Check if a framebuffer color plane is a CCS AUX plane
 * @fb: Framebuffer
 * @color_plane: color plane index to check
 *
 * Returns:
 * Returns %true if @fb's color plane at index @color_plane is a CCS AUX plane.
 */
bool intel_fb_is_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane)
{ … }

/**
 * intel_fb_is_gen12_ccs_aux_plane: Check if a framebuffer color plane is a GEN12 CCS AUX plane
 * @fb: Framebuffer
 * @color_plane: color plane index to check
 *
 * Returns:
 * Returns %true if @fb's color plane at index @color_plane is a GEN12 CCS AUX plane.
 */
static bool intel_fb_is_gen12_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane)
{ … }

/**
 * intel_fb_rc_ccs_cc_plane: Get the CCS CC color plane index for a framebuffer
 * @fb: Framebuffer
 *
 * Returns:
 * Returns the index of the color clear plane for @fb, or -1 if @fb is not a
 * framebuffer using a render compression/color clear modifier.
 */
int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb)
{ … }

static bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int color_plane)
{ … }

bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
{ … }

int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
{ … }

int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
{ … }

static unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
{ … }

int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
{ … }

unsigned int intel_tile_size(const struct drm_i915_private *i915)
{ … }

unsigned int
intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
{ … }

unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
{ … }

/*
 * Return the tile dimensions in pixel units, based on the (2 or 4 kbyte) GTT
 * page tile size.
 */
static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
			    unsigned int *tile_width,
			    unsigned int *tile_height)
{ … }

/*
 * Return the tile dimensions in pixel units, based on the tile block size.
 * The block covers the full GTT page sized tile on all tiled surfaces and
 * it's a 64 byte portion of the tile on TGL+ CCS surfaces.
 */
static void intel_tile_block_dims(const struct drm_framebuffer *fb, int color_plane,
				  unsigned int *tile_width,
				  unsigned int *tile_height)
{ … }

unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane)
{ … }

unsigned int
intel_fb_align_height(const struct drm_framebuffer *fb,
		      int color_plane, unsigned int height)
{ … }

bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)
{ … }

bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
{ … }

void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
				    const struct drm_framebuffer *fb,
				    int color_plane)
{ … }

static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_plane, int *w, int *h)
{ … }

static u32 intel_adjust_tile_offset(int *x, int *y,
				    unsigned int tile_width,
				    unsigned int tile_height,
				    unsigned int tile_size,
				    unsigned int pitch_tiles,
				    u32 old_offset,
				    u32 new_offset)
{ … }

static u32 intel_adjust_linear_offset(int *x, int *y,
				      unsigned int cpp,
				      unsigned int pitch,
				      u32 old_offset,
				      u32 new_offset)
{ … }

static u32 intel_adjust_aligned_offset(int *x, int *y,
				       const struct drm_framebuffer *fb,
				       int color_plane,
				       unsigned int rotation,
				       unsigned int pitch,
				       u32 old_offset, u32 new_offset)
{ … }

/*
 * Adjust the tile offset by moving the difference into
 * the x/y offsets.
 */
u32 intel_plane_adjust_aligned_offset(int *x, int *y,
				      const struct intel_plane_state *state,
				      int color_plane,
				      u32 old_offset, u32 new_offset)
{ … }

/*
 * Computes the aligned offset to the base tile and adjusts
 * x, y. bytes per pixel is assumed to be a power-of-two.
 *
 * In the 90/270 rotated case, x and y are assumed
 * to be already rotated to match the rotated GTT view, and
 * pitch is the tile_height aligned framebuffer height.
 *
 * This function is used when computing the derived information
 * under intel_framebuffer, so using any of that information
 * here is not allowed. Anything under drm_framebuffer can be
 * used. This is why the user has to pass in the pitch since it
 * is specified in the rotated orientation.
 */
static u32 intel_compute_aligned_offset(struct drm_i915_private *i915,
					int *x, int *y,
					const struct drm_framebuffer *fb,
					int color_plane,
					unsigned int pitch,
					unsigned int rotation,
					unsigned int alignment)
{ … }

u32 intel_plane_compute_aligned_offset(int *x, int *y,
				       const struct intel_plane_state *state,
				       int color_plane)
{ … }

/* Convert the fb->offset[] into x/y offsets */
static int intel_fb_offset_to_xy(int *x, int *y,
				 const struct drm_framebuffer *fb,
				 int color_plane)
{ … }

static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane, int x, int y)
{ … }

static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
{ … }

bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
{ … }

static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
{ … }

static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
{ … }

static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int color_plane,
				      int plane_width, int *x, int *y)
{ … }

static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
{ … }

struct fb_plane_view_dims { … };

static void init_plane_view_dims(const struct intel_framebuffer *fb, int color_plane,
				 unsigned int width, unsigned int height,
				 struct fb_plane_view_dims *dims)
{ … }

static unsigned int
plane_view_src_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
			    const struct fb_plane_view_dims *dims)
{ … }

static unsigned int
plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
			    unsigned int pitch_tiles)
{ … }

static unsigned int
plane_view_scanout_stride(const struct intel_framebuffer *fb, int color_plane,
			  unsigned int tile_width,
			  unsigned int src_stride_tiles, unsigned int dst_stride_tiles)
{ … }

static unsigned int
plane_view_width_tiles(const struct intel_framebuffer *fb, int color_plane,
		       const struct fb_plane_view_dims *dims,
		       int x)
{ … }

static unsigned int
plane_view_height_tiles(const struct intel_framebuffer *fb, int color_plane,
			const struct fb_plane_view_dims *dims,
			int y)
{ … }

static unsigned int
plane_view_linear_tiles(const struct intel_framebuffer *fb, int color_plane,
			const struct fb_plane_view_dims *dims,
			int x, int y)
{ … }

#define assign_chk_ovf …

#define assign_bfld_chk_ovf(i915, var, val) …

static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_plane,
				 const struct fb_plane_view_dims *dims,
				 u32 obj_offset, u32 gtt_offset, int x, int y,
				 struct intel_fb_view *view)
{ … }

#undef assign_chk_ovf

/* Return number of tiles @color_plane needs. */
static unsigned int
calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
		       const struct fb_plane_view_dims *dims,
		       int x, int y)
{ … }

static void intel_fb_view_init(struct drm_i915_private *i915, struct intel_fb_view *view,
			       enum i915_gtt_view_type view_type)
{ … }

bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb)
{ … }

static unsigned int intel_fb_min_alignment(const struct drm_framebuffer *fb)
{ … }

int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb)
{ … }

static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
{ … }

void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
			struct intel_fb_view *view)
{ … }

static
u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
			u32 pixel_format, u64 modifier)
{ … }

static unsigned int
intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
{ … }

static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
{ … }

int intel_plane_compute_gtt(struct intel_plane_state *plane_state)
{ … }

static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb)
{ … }

static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb,
						struct drm_file *file,
						unsigned int *handle)
{ … }

struct frontbuffer_fence_cb { … };

static void intel_user_framebuffer_fence_wake(struct dma_fence *dma,
					      struct dma_fence_cb *data)
{ … }

static int intel_user_framebuffer_dirty(struct drm_framebuffer *fb,
					struct drm_file *file,
					unsigned int flags, unsigned int color,
					struct drm_clip_rect *clips,
					unsigned int num_clips)
{ … }

static const struct drm_framebuffer_funcs intel_fb_funcs = …;

int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
			   struct drm_i915_gem_object *obj,
			   struct drm_mode_fb_cmd2 *mode_cmd)
{ … }

struct drm_framebuffer *
intel_user_framebuffer_create(struct drm_device *dev,
			      struct drm_file *filp,
			      const struct drm_mode_fb_cmd2 *user_mode_cmd)
{ … }

struct drm_framebuffer *
intel_framebuffer_create(struct drm_i915_gem_object *obj,
			 struct drm_mode_fb_cmd2 *mode_cmd)
{ … }
linux/drivers/gpu/drm/i915/display/intel_fb.c
