linux/drivers/gpu/drm/i915/display/icl_dsi.c

/*
 * Copyright © 2018 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *   Madhav Chauhan <[email protected]>
 *   Jani Nikula <[email protected]>
 */

#include <drm/display/drm_dsc_helper.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fixed.h>
#include <drm/drm_mipi_dsi.h>

#include "i915_reg.h"
#include "icl_dsi.h"
#include "icl_dsi_regs.h"
#include "intel_atomic.h"
#include "intel_backlight.h"
#include "intel_backlight_regs.h"
#include "intel_combo_phy.h"
#include "intel_combo_phy_regs.h"
#include "intel_connector.h"
#include "intel_crtc.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_dsi.h"
#include "intel_dsi_vbt.h"
#include "intel_panel.h"
#include "intel_vdsc.h"
#include "intel_vdsc_regs.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"

static int header_credits_available(struct drm_i915_private *dev_priv,
				    enum transcoder dsi_trans)
{}

static int payload_credits_available(struct drm_i915_private *dev_priv,
				     enum transcoder dsi_trans)
{}

static bool wait_for_header_credits(struct drm_i915_private *dev_priv,
				    enum transcoder dsi_trans, int hdr_credit)
{}

static bool wait_for_payload_credits(struct drm_i915_private *dev_priv,
				     enum transcoder dsi_trans, int payld_credit)
{}

static enum transcoder dsi_port_to_transcoder(enum port port)
{}

static void wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder)
{}

static int dsi_send_pkt_payld(struct intel_dsi_host *host,
			      const struct mipi_dsi_packet *packet)
{}

static int dsi_send_pkt_hdr(struct intel_dsi_host *host,
			    const struct mipi_dsi_packet *packet,
			    bool enable_lpdt)
{}

void icl_dsi_frame_update(struct intel_crtc_state *crtc_state)
{}

static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
{}

static void configure_dual_link_mode(struct intel_encoder *encoder,
				     const struct intel_crtc_state *pipe_config)
{}

/* aka DSI 8X clock */
static int afe_clk(struct intel_encoder *encoder,
		   const struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder,
					  const struct intel_crtc_state *crtc_state)
{}

static void get_dsi_io_power_domains(struct drm_i915_private *dev_priv,
				     struct intel_dsi *intel_dsi)
{}

static void gen11_dsi_enable_io_power(struct intel_encoder *encoder)
{}

static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
{}

static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder)
{}

static void gen11_dsi_voltage_swing_program_seq(struct intel_encoder *encoder)
{}

static void gen11_dsi_enable_ddi_buffer(struct intel_encoder *encoder)
{}

static void
gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder,
			     const struct intel_crtc_state *crtc_state)
{}

static void
gen11_dsi_setup_timings(struct intel_encoder *encoder,
			const struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_gate_clocks(struct intel_encoder *encoder)
{}

static void gen11_dsi_ungate_clocks(struct intel_encoder *encoder)
{}

static bool gen11_dsi_is_clock_enabled(struct intel_encoder *encoder)
{}

static void gen11_dsi_map_pll(struct intel_encoder *encoder,
			      const struct intel_crtc_state *crtc_state)
{}

static void
gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
			       const struct intel_crtc_state *pipe_config)
{}

static void
gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder,
				 const struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_enable_transcoder(struct intel_encoder *encoder)
{}

static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder,
				     const struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_config_util_pin(struct intel_encoder *encoder,
				      bool enable)
{}

static void
gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder,
			      const struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
{}

static void gen11_dsi_pre_pll_enable(struct intel_atomic_state *state,
				     struct intel_encoder *encoder,
				     const struct intel_crtc_state *crtc_state,
				     const struct drm_connector_state *conn_state)
{}

static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
				 struct intel_encoder *encoder,
				 const struct intel_crtc_state *pipe_config,
				 const struct drm_connector_state *conn_state)
{}

/*
 * Wa_1409054076:icl,jsl,ehl
 * When pipe A is disabled and MIPI DSI is enabled on pipe B,
 * the AMT KVMR feature will incorrectly see pipe A as enabled.
 * Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
 * it set while DSI is enabled on pipe B
 */
static void icl_apply_kvmr_pipe_a_wa(struct intel_encoder *encoder,
				     enum pipe pipe, bool enable)
{}

/*
 * Wa_16012360555:adl-p
 * SW will have to program the "LP to HS Wakeup Guardband"
 * to account for the repeaters on the HS Request/Ready
 * PPI signaling between the Display engine and the DPHY.
 */
static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
{}

static void gen11_dsi_enable(struct intel_atomic_state *state,
			     struct intel_encoder *encoder,
			     const struct intel_crtc_state *crtc_state,
			     const struct drm_connector_state *conn_state)
{}

static void gen11_dsi_disable_transcoder(struct intel_encoder *encoder)
{}

static void gen11_dsi_powerdown_panel(struct intel_encoder *encoder)
{}

static void gen11_dsi_deconfigure_trancoder(struct intel_encoder *encoder)
{}

static void gen11_dsi_disable_port(struct intel_encoder *encoder)
{}

static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
{}

static void gen11_dsi_disable(struct intel_atomic_state *state,
			      struct intel_encoder *encoder,
			      const struct intel_crtc_state *old_crtc_state,
			      const struct drm_connector_state *old_conn_state)
{}

static void gen11_dsi_post_disable(struct intel_atomic_state *state,
				   struct intel_encoder *encoder,
				   const struct intel_crtc_state *old_crtc_state,
				   const struct drm_connector_state *old_conn_state)
{}

static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
						 struct drm_display_mode *mode)
{}

static void gen11_dsi_get_timings(struct intel_encoder *encoder,
				  struct intel_crtc_state *pipe_config)
{}

static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi)
{}

static void gen11_dsi_get_cmd_mode_config(struct intel_dsi *intel_dsi,
					  struct intel_crtc_state *pipe_config)
{}

static void gen11_dsi_get_config(struct intel_encoder *encoder,
				 struct intel_crtc_state *pipe_config)
{}

static void gen11_dsi_sync_state(struct intel_encoder *encoder,
				 const struct intel_crtc_state *crtc_state)
{}

static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
					struct intel_crtc_state *crtc_state)
{}

static int gen11_dsi_compute_config(struct intel_encoder *encoder,
				    struct intel_crtc_state *pipe_config,
				    struct drm_connector_state *conn_state)
{}

static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
					struct intel_crtc_state *crtc_state)
{}

static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
				   enum pipe *pipe)
{}

static bool gen11_dsi_initial_fastset_check(struct intel_encoder *encoder,
					    struct intel_crtc_state *crtc_state)
{}

static void gen11_dsi_encoder_destroy(struct drm_encoder *encoder)
{}

static const struct drm_encoder_funcs gen11_dsi_encoder_funcs =;

static const struct drm_connector_funcs gen11_dsi_connector_funcs =;

static const struct drm_connector_helper_funcs gen11_dsi_connector_helper_funcs =;

static int gen11_dsi_host_attach(struct mipi_dsi_host *host,
				 struct mipi_dsi_device *dsi)
{}

static int gen11_dsi_host_detach(struct mipi_dsi_host *host,
				 struct mipi_dsi_device *dsi)
{}

static ssize_t gen11_dsi_host_transfer(struct mipi_dsi_host *host,
				       const struct mipi_dsi_msg *msg)
{}

static const struct mipi_dsi_host_ops gen11_dsi_host_ops =;

#define ICL_PREPARE_CNT_MAX
#define ICL_CLK_ZERO_CNT_MAX
#define ICL_TRAIL_CNT_MAX
#define ICL_TCLK_PRE_CNT_MAX
#define ICL_TCLK_POST_CNT_MAX
#define ICL_HS_ZERO_CNT_MAX
#define ICL_EXIT_ZERO_CNT_MAX

static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
{}

static void icl_dsi_add_properties(struct intel_connector *connector)
{}

void icl_dsi_init(struct drm_i915_private *dev_priv,
		  const struct intel_bios_encoder_data *devdata)
{}