linux/drivers/gpu/drm/i915/display/intel_vdsc.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2018 Intel Corporation
 *
 * Author: Gaurav K Singh <[email protected]>
 *         Manasi Navare <[email protected]>
 */
#include <linux/limits.h>

#include <drm/display/drm_dsc_helper.h>
#include <drm/drm_fixed.h>

#include "i915_drv.h"
#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dsi.h"
#include "intel_qp_tables.h"
#include "intel_vdsc.h"
#include "intel_vdsc_regs.h"

bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
{ … }

static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
{ … }

static void
intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
			  int bpp)
{ … }

/*
 * We are using the method provided in DSC 1.2a C-Model in codec_main.c
 * Above method use a common formula to derive values for any combination of DSC
 * variables. The formula approach may yield slight differences in the derived PPS
 * parameters from the original parameter sets. These differences are not consequential
 * to the coding performance because all parameter sets have been shown to produce
 * visually lossless quality (provides the same PPS values as
 * DSCParameterValuesVESA V1-2 spreadsheet).
 */
static void
calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
{ … }

static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config,
					    struct drm_dsc_config *vdsc_cfg)
{ … }

int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
{ … }

enum intel_display_power_domain
intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
{ … }

static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state)
{ … }

int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state)
{ … }

static void intel_dsc_get_pps_reg(const struct intel_crtc_state *crtc_state, int pps,
				  i915_reg_t *dsc_reg, int dsc_reg_num)
{ … }

static void intel_dsc_pps_write(const struct intel_crtc_state *crtc_state,
				int pps, u32 pps_val)
{ … }

static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
{ … }

void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
			     const struct intel_crtc_state *crtc_state)
{ … }

void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
			    const struct intel_crtc_state *crtc_state)
{ … }

static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
{ … }

static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
{ … }

void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
{ … }

void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
{ … }

void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
{ … }

static u32 intel_dsc_pps_read(struct intel_crtc_state *crtc_state, int pps,
			      bool *all_equal)
{ … }

static u32 intel_dsc_pps_read_and_verify(struct intel_crtc_state *crtc_state, int pps)
{ … }

static void intel_dsc_get_pps_config(struct intel_crtc_state *crtc_state)
{ … }

void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
{ … }

static void intel_vdsc_dump_state(struct drm_printer *p, int indent,
				  const struct intel_crtc_state *crtc_state)
{ … }

void intel_vdsc_state_dump(struct drm_printer *p, int indent,
			   const struct intel_crtc_state *crtc_state)
{ … }