// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2016-2018 Nuvoton Technology corporation. // Copyright (c) 2016, Dell Inc #include <linux/device.h> #include <linux/gpio/driver.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/platform_device.h> #include <linux/property.h> #include <linux/regmap.h> #include <linux/seq_file.h> #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/machine.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> /* GCR registers */ #define NPCM7XX_GCR_PDID … #define NPCM7XX_GCR_MFSEL1 … #define NPCM7XX_GCR_MFSEL2 … #define NPCM7XX_GCR_MFSEL3 … #define NPCM7XX_GCR_MFSEL4 … #define NPCM7XX_GCR_CPCTL … #define NPCM7XX_GCR_CP2BST … #define NPCM7XX_GCR_B2CPNT … #define NPCM7XX_GCR_I2CSEGSEL … #define NPCM7XX_GCR_I2CSEGCTL … #define NPCM7XX_GCR_SRCNT … #define NPCM7XX_GCR_FLOCKR1 … #define NPCM7XX_GCR_DSCNT … #define SRCNT_ESPI … /* GPIO registers */ #define NPCM7XX_GP_N_TLOCK1 … #define NPCM7XX_GP_N_DIN … #define NPCM7XX_GP_N_POL … #define NPCM7XX_GP_N_DOUT … #define NPCM7XX_GP_N_OE … #define NPCM7XX_GP_N_OTYP … #define NPCM7XX_GP_N_MP … #define NPCM7XX_GP_N_PU … #define NPCM7XX_GP_N_PD … #define NPCM7XX_GP_N_DBNC … #define NPCM7XX_GP_N_EVTYP … #define NPCM7XX_GP_N_EVBE … #define NPCM7XX_GP_N_OBL0 … #define NPCM7XX_GP_N_OBL1 … #define NPCM7XX_GP_N_OBL2 … #define NPCM7XX_GP_N_OBL3 … #define NPCM7XX_GP_N_EVEN … #define NPCM7XX_GP_N_EVENS … #define NPCM7XX_GP_N_EVENC … #define NPCM7XX_GP_N_EVST … #define NPCM7XX_GP_N_SPLCK … #define NPCM7XX_GP_N_MPLCK … #define NPCM7XX_GP_N_IEM … #define NPCM7XX_GP_N_OSRC … #define NPCM7XX_GP_N_ODSC … #define NPCM7XX_GP_N_DOS … #define NPCM7XX_GP_N_DOC … #define NPCM7XX_GP_N_OES … #define NPCM7XX_GP_N_OEC … #define NPCM7XX_GP_N_TLOCK2 … #define NPCM7XX_GPIO_PER_BANK … #define NPCM7XX_GPIO_BANK_NUM … #define NPCM7XX_GCR_NONE … /* Structure for register banks */ struct npcm7xx_gpio { … }; struct npcm7xx_pinctrl { … }; /* GPIO handling in the pinctrl driver */ static void npcm_gpio_set(struct gpio_chip *gc, void __iomem *reg, unsigned int pinmask) { … } static void npcm_gpio_clr(struct gpio_chip *gc, void __iomem *reg, unsigned int pinmask) { … } static void npcmgpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) { … } static int npcmgpio_direction_input(struct gpio_chip *chip, unsigned int offset) { … } /* Set GPIO to Output with initial value */ static int npcmgpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { … } static int npcmgpio_gpio_request(struct gpio_chip *chip, unsigned int offset) { … } static void npcmgpio_irq_handler(struct irq_desc *desc) { … } static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type) { … } static void npcmgpio_irq_ack(struct irq_data *d) { … } /* Disable GPIO interrupt */ static void npcmgpio_irq_mask(struct irq_data *d) { … } /* Enable GPIO interrupt */ static void npcmgpio_irq_unmask(struct irq_data *d) { … } static unsigned int npcmgpio_irq_startup(struct irq_data *d) { … } static const struct irq_chip npcmgpio_irqchip = …; /* pinmux handing in the pinctrl driver*/ static const int smb0_pins[] = …; static const int smb0b_pins[] = …; static const int smb0c_pins[] = …; static const int smb0d_pins[] = …; static const int smb0den_pins[] = …; static const int smb1_pins[] = …; static const int smb1b_pins[] = …; static const int smb1c_pins[] = …; static const int smb1d_pins[] = …; static const int smb2_pins[] = …; static const int smb2b_pins[] = …; static const int smb2c_pins[] = …; static const int smb2d_pins[] = …; static const int smb3_pins[] = …; static const int smb3b_pins[] = …; static const int smb3c_pins[] = …; static const int smb3d_pins[] = …; static const int smb4_pins[] = …; static const int smb4b_pins[] = …; static const int smb4c_pins[] = …; static const int smb4d_pins[] = …; static const int smb4den_pins[] = …; static const int smb5_pins[] = …; static const int smb5b_pins[] = …; static const int smb5c_pins[] = …; static const int smb5d_pins[] = …; static const int ga20kbc_pins[] = …; static const int smb6_pins[] = …; static const int smb7_pins[] = …; static const int smb8_pins[] = …; static const int smb9_pins[] = …; static const int smb10_pins[] = …; static const int smb11_pins[] = …; static const int smb12_pins[] = …; static const int smb13_pins[] = …; static const int smb14_pins[] = …; static const int smb15_pins[] = …; static const int fanin0_pins[] = …; static const int fanin1_pins[] = …; static const int fanin2_pins[] = …; static const int fanin3_pins[] = …; static const int fanin4_pins[] = …; static const int fanin5_pins[] = …; static const int fanin6_pins[] = …; static const int fanin7_pins[] = …; static const int fanin8_pins[] = …; static const int fanin9_pins[] = …; static const int fanin10_pins[] = …; static const int fanin11_pins[] = …; static const int fanin12_pins[] = …; static const int fanin13_pins[] = …; static const int fanin14_pins[] = …; static const int fanin15_pins[] = …; static const int faninx_pins[] = …; static const int pwm0_pins[] = …; static const int pwm1_pins[] = …; static const int pwm2_pins[] = …; static const int pwm3_pins[] = …; static const int pwm4_pins[] = …; static const int pwm5_pins[] = …; static const int pwm6_pins[] = …; static const int pwm7_pins[] = …; static const int uart1_pins[] = …; static const int uart2_pins[] = …; /* RGMII 1 pin group */ static const int rg1_pins[] = …; /* RGMII 1 MD interface pin group */ static const int rg1mdio_pins[] = …; /* RGMII 2 pin group */ static const int rg2_pins[] = …; /* RGMII 2 MD interface pin group */ static const int rg2mdio_pins[] = …; static const int ddr_pins[] = …; /* Serial I/O Expander 1 */ static const int iox1_pins[] = …; /* Serial I/O Expander 2 */ static const int iox2_pins[] = …; /* Host Serial I/O Expander 2 */ static const int ioxh_pins[] = …; static const int mmc_pins[] = …; static const int mmcwp_pins[] = …; static const int mmccd_pins[] = …; static const int mmcrst_pins[] = …; static const int mmc8_pins[] = …; /* RMII 1 pin groups */ static const int r1_pins[] = …; static const int r1err_pins[] = …; static const int r1md_pins[] = …; /* RMII 2 pin groups */ static const int r2_pins[] = …; static const int r2err_pins[] = …; static const int r2md_pins[] = …; static const int sd1_pins[] = …; static const int sd1pwr_pins[] = …; static const int wdog1_pins[] = …; static const int wdog2_pins[] = …; /* BMC serial port 0 */ static const int bmcuart0a_pins[] = …; static const int bmcuart0b_pins[] = …; static const int bmcuart1_pins[] = …; /* System Control Interrupt and Power Management Event pin group */ static const int scipme_pins[] = …; /* System Management Interrupt pin group */ static const int sci_pins[] = …; /* Serial Interrupt Line pin group */ static const int serirq_pins[] = …; static const int clkout_pins[] = …; static const int clkreq_pins[] = …; static const int jtag2_pins[] = …; /* Graphics SPI Clock pin group */ static const int gspi_pins[] = …; static const int spix_pins[] = …; static const int spixcs1_pins[] = …; static const int pspi1_pins[] = …; static const int pspi2_pins[] = …; static const int spi0cs1_pins[] = …; static const int spi3_pins[] = …; static const int spi3cs1_pins[] = …; static const int spi3quad_pins[] = …; static const int spi3cs2_pins[] = …; static const int spi3cs3_pins[] = …; static const int ddc_pins[] = …; static const int lpc_pins[] = …; static const int lpcclk_pins[] = …; static const int espi_pins[] = …; static const int lkgpo0_pins[] = …; static const int lkgpo1_pins[] = …; static const int lkgpo2_pins[] = …; static const int nprd_smi_pins[] = …; /* * pin: name, number * group: name, npins, pins * function: name, ngroups, groups */ struct npcm7xx_group { … }; #define NPCM7XX_GRPS … \ \ enum { … }; static struct npcm7xx_group npcm7xx_groups[] = …; #define NPCM7XX_SFUNC(a) … #define NPCM7XX_FUNC(a, b...) … #define NPCM7XX_MKFUNC(nm) … struct npcm7xx_func { … }; NPCM7XX_SFUNC(smb0); NPCM7XX_SFUNC(smb0b); NPCM7XX_SFUNC(smb0c); NPCM7XX_SFUNC(smb0d); NPCM7XX_SFUNC(smb0den); NPCM7XX_SFUNC(smb1); NPCM7XX_SFUNC(smb1b); NPCM7XX_SFUNC(smb1c); NPCM7XX_SFUNC(smb1d); NPCM7XX_SFUNC(smb2); NPCM7XX_SFUNC(smb2b); NPCM7XX_SFUNC(smb2c); NPCM7XX_SFUNC(smb2d); NPCM7XX_SFUNC(smb3); NPCM7XX_SFUNC(smb3b); NPCM7XX_SFUNC(smb3c); NPCM7XX_SFUNC(smb3d); NPCM7XX_SFUNC(smb4); NPCM7XX_SFUNC(smb4b); NPCM7XX_SFUNC(smb4c); NPCM7XX_SFUNC(smb4d); NPCM7XX_SFUNC(smb4den); NPCM7XX_SFUNC(smb5); NPCM7XX_SFUNC(smb5b); NPCM7XX_SFUNC(smb5c); NPCM7XX_SFUNC(smb5d); NPCM7XX_SFUNC(ga20kbc); NPCM7XX_SFUNC(smb6); NPCM7XX_SFUNC(smb7); NPCM7XX_SFUNC(smb8); NPCM7XX_SFUNC(smb9); NPCM7XX_SFUNC(smb10); NPCM7XX_SFUNC(smb11); NPCM7XX_SFUNC(smb12); NPCM7XX_SFUNC(smb13); NPCM7XX_SFUNC(smb14); NPCM7XX_SFUNC(smb15); NPCM7XX_SFUNC(fanin0); NPCM7XX_SFUNC(fanin1); NPCM7XX_SFUNC(fanin2); NPCM7XX_SFUNC(fanin3); NPCM7XX_SFUNC(fanin4); NPCM7XX_SFUNC(fanin5); NPCM7XX_SFUNC(fanin6); NPCM7XX_SFUNC(fanin7); NPCM7XX_SFUNC(fanin8); NPCM7XX_SFUNC(fanin9); NPCM7XX_SFUNC(fanin10); NPCM7XX_SFUNC(fanin11); NPCM7XX_SFUNC(fanin12); NPCM7XX_SFUNC(fanin13); NPCM7XX_SFUNC(fanin14); NPCM7XX_SFUNC(fanin15); NPCM7XX_SFUNC(faninx); NPCM7XX_SFUNC(pwm0); NPCM7XX_SFUNC(pwm1); NPCM7XX_SFUNC(pwm2); NPCM7XX_SFUNC(pwm3); NPCM7XX_SFUNC(pwm4); NPCM7XX_SFUNC(pwm5); NPCM7XX_SFUNC(pwm6); NPCM7XX_SFUNC(pwm7); NPCM7XX_SFUNC(rg1); NPCM7XX_SFUNC(rg1mdio); NPCM7XX_SFUNC(rg2); NPCM7XX_SFUNC(rg2mdio); NPCM7XX_SFUNC(ddr); NPCM7XX_SFUNC(uart1); NPCM7XX_SFUNC(uart2); NPCM7XX_SFUNC(bmcuart0a); NPCM7XX_SFUNC(bmcuart0b); NPCM7XX_SFUNC(bmcuart1); NPCM7XX_SFUNC(iox1); NPCM7XX_SFUNC(iox2); NPCM7XX_SFUNC(ioxh); NPCM7XX_SFUNC(gspi); NPCM7XX_SFUNC(mmc); NPCM7XX_SFUNC(mmcwp); NPCM7XX_SFUNC(mmccd); NPCM7XX_SFUNC(mmcrst); NPCM7XX_SFUNC(mmc8); NPCM7XX_SFUNC(r1); NPCM7XX_SFUNC(r1err); NPCM7XX_SFUNC(r1md); NPCM7XX_SFUNC(r2); NPCM7XX_SFUNC(r2err); NPCM7XX_SFUNC(r2md); NPCM7XX_SFUNC(sd1); NPCM7XX_SFUNC(sd1pwr); NPCM7XX_SFUNC(wdog1); NPCM7XX_SFUNC(wdog2); NPCM7XX_SFUNC(scipme); NPCM7XX_SFUNC(sci); NPCM7XX_SFUNC(serirq); NPCM7XX_SFUNC(jtag2); NPCM7XX_SFUNC(spix); NPCM7XX_SFUNC(spixcs1); NPCM7XX_SFUNC(pspi1); NPCM7XX_SFUNC(pspi2); NPCM7XX_SFUNC(ddc); NPCM7XX_SFUNC(clkreq); NPCM7XX_SFUNC(clkout); NPCM7XX_SFUNC(spi3); NPCM7XX_SFUNC(spi3cs1); NPCM7XX_SFUNC(spi3quad); NPCM7XX_SFUNC(spi3cs2); NPCM7XX_SFUNC(spi3cs3); NPCM7XX_SFUNC(spi0cs1); NPCM7XX_SFUNC(lpc); NPCM7XX_SFUNC(lpcclk); NPCM7XX_SFUNC(espi); NPCM7XX_SFUNC(lkgpo0); NPCM7XX_SFUNC(lkgpo1); NPCM7XX_SFUNC(lkgpo2); NPCM7XX_SFUNC(nprd_smi); /* Function names */ static struct npcm7xx_func npcm7xx_funcs[] = …; #define NPCM7XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k) … /* Drive strength controlled by NPCM7XX_GP_N_ODSC */ #define DRIVE_STRENGTH_LO_SHIFT … #define DRIVE_STRENGTH_HI_SHIFT … #define DRIVE_STRENGTH_MASK … #define DSTR(lo, hi) … #define DSLO(x) … #define DSHI(x) … #define GPI … #define GPO … #define SLEW … #define SLEWLPC … struct npcm7xx_pincfg { … }; static const struct npcm7xx_pincfg pincfg[] = …; /* number, name, drv_data */ static const struct pinctrl_pin_desc npcm7xx_pins[] = …; /* Enable mode in pin group */ static void npcm7xx_setfunc(struct regmap *gcr_regmap, const unsigned int *pin, int pin_number, int mode) { … } /* Get slew rate of pin (high/low) */ static int npcm7xx_get_slew_rate(struct npcm7xx_gpio *bank, struct regmap *gcr_regmap, unsigned int pin) { … } /* Set slew rate of pin (high/low) */ static int npcm7xx_set_slew_rate(struct npcm7xx_gpio *bank, struct regmap *gcr_regmap, unsigned int pin, int arg) { … } /* Get drive strength for a pin, if supported */ static int npcm7xx_get_drive_strength(struct pinctrl_dev *pctldev, unsigned int pin) { … } /* Set drive strength for a pin, if supported */ static int npcm7xx_set_drive_strength(struct npcm7xx_pinctrl *npcm, unsigned int pin, int nval) { … } /* pinctrl_ops */ static void npcm7xx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int offset) { … } static int npcm7xx_get_groups_count(struct pinctrl_dev *pctldev) { … } static const char *npcm7xx_get_group_name(struct pinctrl_dev *pctldev, unsigned int selector) { … } static int npcm7xx_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, const unsigned int **pins, unsigned int *npins) { … } static void npcm7xx_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, u32 num_maps) { … } static const struct pinctrl_ops npcm7xx_pinctrl_ops = …; /* pinmux_ops */ static int npcm7xx_get_functions_count(struct pinctrl_dev *pctldev) { … } static const char *npcm7xx_get_function_name(struct pinctrl_dev *pctldev, unsigned int function) { … } static int npcm7xx_get_function_groups(struct pinctrl_dev *pctldev, unsigned int function, const char * const **groups, unsigned int * const ngroups) { … } static int npcm7xx_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function, unsigned int group) { … } static int npcm7xx_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { … } /* Release GPIO back to pinctrl mode */ static void npcm7xx_gpio_request_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { … } /* Set GPIO direction */ static int npcm_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) { … } static const struct pinmux_ops npcm7xx_pinmux_ops = …; /* pinconf_ops */ static int npcm7xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { … } static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm, unsigned int pin, unsigned long config) { … } /* Set multiple configuration settings for a pin */ static int npcm7xx_config_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) { … } static const struct pinconf_ops npcm7xx_pinconf_ops = …; /* pinctrl_desc */ static struct pinctrl_desc npcm7xx_pinctrl_desc = …; static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) { … } static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) { … } static int npcm7xx_pinctrl_probe(struct platform_device *pdev) { … } static const struct of_device_id npcm7xx_pinctrl_match[] = …; MODULE_DEVICE_TABLE(of, npcm7xx_pinctrl_match); static struct platform_driver npcm7xx_pinctrl_driver = …; static int __init npcm7xx_pinctrl_register(void) { … } arch_initcall(npcm7xx_pinctrl_register); MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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