// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023, Linaro Limited */ #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include "pinctrl-msm.h" #define REG_BASE … #define REG_SIZE … #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) … #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) … #define UFS_RESET(pg_name, offset) … #define QUP_I3C(qup_mode, qup_offset) … #define QUP_I3C_6_MODE_OFFSET … #define QUP_I3C_7_MODE_OFFSET … #define QUP_I3C_13_MODE_OFFSET … #define QUP_I3C_14_MODE_OFFSET … static const struct pinctrl_pin_desc sa8775p_pins[] = …; #define DECLARE_MSM_GPIO_PINS(pin) … DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); DECLARE_MSM_GPIO_PINS(…); static const unsigned int ufs_reset_pins[] = …; static const unsigned int sdc1_rclk_pins[] = …; static const unsigned int sdc1_clk_pins[] = …; static const unsigned int sdc1_cmd_pins[] = …; static const unsigned int sdc1_data_pins[] = …; enum sa8775p_functions { … }; static const char * const gpio_groups[] = …; static const char * const atest_char_groups[] = …; static const char * const atest_usb2_groups[] = …; static const char * const audio_ref_groups[] = …; static const char * const cam_mclk_groups[] = …; static const char * const cci_async_groups[] = …; static const char * const cci_i2c_groups[] = …; static const char * const cci_timer0_groups[] = …; static const char * const cci_timer1_groups[] = …; static const char * const cci_timer2_groups[] = …; static const char * const cci_timer3_groups[] = …; static const char * const cci_timer4_groups[] = …; static const char * const cci_timer5_groups[] = …; static const char * const cci_timer6_groups[] = …; static const char * const cci_timer7_groups[] = …; static const char * const cci_timer8_groups[] = …; static const char * const cci_timer9_groups[] = …; static const char * const cri_trng_groups[] = …; static const char * const cri_trng0_groups[] = …; static const char * const cri_trng1_groups[] = …; static const char * const dbg_out_groups[] = …; static const char * const ddr_bist_groups[] = …; static const char * const ddr_pxi0_groups[] = …; static const char * const ddr_pxi1_groups[] = …; static const char * const ddr_pxi2_groups[] = …; static const char * const ddr_pxi3_groups[] = …; static const char * const ddr_pxi4_groups[] = …; static const char * const ddr_pxi5_groups[] = …; static const char * const edp0_hot_groups[] = …; static const char * const edp0_lcd_groups[] = …; static const char * const edp1_hot_groups[] = …; static const char * const edp1_lcd_groups[] = …; static const char * const edp2_hot_groups[] = …; static const char * const edp2_lcd_groups[] = …; static const char * const edp3_hot_groups[] = …; static const char * const edp3_lcd_groups[] = …; static const char * const emac0_mcg0_groups[] = …; static const char * const emac0_mcg1_groups[] = …; static const char * const emac0_mcg2_groups[] = …; static const char * const emac0_mcg3_groups[] = …; static const char * const emac0_mdc_groups[] = …; static const char * const emac0_mdio_groups[] = …; static const char * const emac0_ptp_aux_groups[] = …; static const char * const emac0_ptp_pps_groups[] = …; static const char * const emac1_mcg0_groups[] = …; static const char * const emac1_mcg1_groups[] = …; static const char * const emac1_mcg2_groups[] = …; static const char * const emac1_mcg3_groups[] = …; static const char * const emac1_mdc_groups[] = …; static const char * const emac1_mdio_groups[] = …; static const char * const emac1_ptp_aux_groups[] = …; static const char * const emac1_ptp_pps_groups[] = …; static const char * const gcc_gp1_groups[] = …; static const char * const gcc_gp2_groups[] = …; static const char * const gcc_gp3_groups[] = …; static const char * const gcc_gp4_groups[] = …; static const char * const gcc_gp5_groups[] = …; static const char * const hs0_mi2s_groups[] = …; static const char * const hs1_mi2s_groups[] = …; static const char * const hs2_mi2s_groups[] = …; static const char * const ibi_i3c_groups[] = …; static const char * const jitter_bist_groups[] = …; static const char * const mdp0_vsync0_groups[] = …; static const char * const mdp0_vsync1_groups[] = …; static const char * const mdp0_vsync2_groups[] = …; static const char * const mdp0_vsync3_groups[] = …; static const char * const mdp0_vsync4_groups[] = …; static const char * const mdp0_vsync5_groups[] = …; static const char * const mdp0_vsync6_groups[] = …; static const char * const mdp0_vsync7_groups[] = …; static const char * const mdp0_vsync8_groups[] = …; static const char * const mdp1_vsync0_groups[] = …; static const char * const mdp1_vsync1_groups[] = …; static const char * const mdp1_vsync2_groups[] = …; static const char * const mdp1_vsync3_groups[] = …; static const char * const mdp1_vsync4_groups[] = …; static const char * const mdp1_vsync5_groups[] = …; static const char * const mdp1_vsync6_groups[] = …; static const char * const mdp1_vsync7_groups[] = …; static const char * const mdp1_vsync8_groups[] = …; static const char * const mdp_vsync_groups[] = …; static const char * const mi2s1_data0_groups[] = …; static const char * const mi2s1_data1_groups[] = …; static const char * const mi2s1_sck_groups[] = …; static const char * const mi2s1_ws_groups[] = …; static const char * const mi2s2_data0_groups[] = …; static const char * const mi2s2_data1_groups[] = …; static const char * const mi2s2_sck_groups[] = …; static const char * const mi2s2_ws_groups[] = …; static const char * const mi2s_mclk0_groups[] = …; static const char * const mi2s_mclk1_groups[] = …; static const char * const pcie0_clkreq_groups[] = …; static const char * const pcie1_clkreq_groups[] = …; static const char * const phase_flag_groups[] = …; static const char * const pll_bist_groups[] = …; static const char * const pll_clk_groups[] = …; static const char * const prng_rosc0_groups[] = …; static const char * const prng_rosc1_groups[] = …; static const char * const prng_rosc2_groups[] = …; static const char * const prng_rosc3_groups[] = …; static const char * const qdss_cti_groups[] = …; static const char * const qdss_gpio_groups[] = …; static const char * const qup0_se0_groups[] = …; static const char * const qup0_se1_groups[] = …; static const char * const qup0_se2_groups[] = …; static const char * const qup0_se3_groups[] = …; static const char * const qup0_se4_groups[] = …; static const char * const qup0_se5_groups[] = …; static const char * const qup1_se0_groups[] = …; static const char * const qup1_se1_groups[] = …; static const char * const qup1_se2_groups[] = …; static const char * const qup1_se3_groups[] = …; static const char * const qup1_se4_groups[] = …; static const char * const qup1_se5_groups[] = …; static const char * const qup1_se6_groups[] = …; static const char * const qup2_se0_groups[] = …; static const char * const qup2_se1_groups[] = …; static const char * const qup2_se2_groups[] = …; static const char * const qup2_se3_groups[] = …; static const char * const qup2_se4_groups[] = …; static const char * const qup2_se5_groups[] = …; static const char * const qup2_se6_groups[] = …; static const char * const qup3_se0_groups[] = …; static const char * const sail_top_groups[] = …; static const char * const sailss_emac0_groups[] = …; static const char * const sailss_ospi_groups[] = …; static const char * const sgmii_phy_groups[] = …; static const char * const tb_trig_groups[] = …; static const char * const tgu_ch0_groups[] = …; static const char * const tgu_ch1_groups[] = …; static const char * const tgu_ch2_groups[] = …; static const char * const tgu_ch3_groups[] = …; static const char * const tgu_ch4_groups[] = …; static const char * const tgu_ch5_groups[] = …; static const char * const tsense_pwm1_groups[] = …; static const char * const tsense_pwm2_groups[] = …; static const char * const tsense_pwm3_groups[] = …; static const char * const tsense_pwm4_groups[] = …; static const char * const usb2phy_ac_groups[] = …; static const char * const vsense_trigger_groups[] = …; static const struct pinfunction sa8775p_functions[] = …; /* * Every pin is maintained as a single group, and missing or non-existing pin * would be maintained as dummy group to synchronize pin group index with * pin descriptor registered with pinctrl core. * Clients would not be able to request these dummy pin groups. */ static const struct msm_pingroup sa8775p_groups[] = …; static const struct msm_gpio_wakeirq_map sa8775p_pdc_map[] = …; static const struct msm_pinctrl_soc_data sa8775p_pinctrl = …; static int sa8775p_pinctrl_probe(struct platform_device *pdev) { … } static const struct of_device_id sa8775p_pinctrl_of_match[] = …; MODULE_DEVICE_TABLE(of, sa8775p_pinctrl_of_match); static struct platform_driver sa8775p_pinctrl_driver = …; static int __init sa8775p_pinctrl_init(void) { … } arch_initcall(sa8775p_pinctrl_init); static void __exit sa8775p_pinctrl_exit(void) { … } module_exit(sa8775p_pinctrl_exit); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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