linux/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2015, Sony Mobile Communications AB.
 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
 */

#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/seq_file.h>
#include <linux/slab.h>

#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

#include "../core.h"
#include "../pinctrl-utils.h"

/* mode */
#define PM8XXX_GPIO_MODE_ENABLED
#define PM8XXX_GPIO_MODE_INPUT
#define PM8XXX_GPIO_MODE_OUTPUT

/* output buffer */
#define PM8XXX_GPIO_PUSH_PULL
#define PM8XXX_GPIO_OPEN_DRAIN

/* bias */
#define PM8XXX_GPIO_BIAS_PU_30
#define PM8XXX_GPIO_BIAS_PU_1P5
#define PM8XXX_GPIO_BIAS_PU_31P5
#define PM8XXX_GPIO_BIAS_PU_1P5_30
#define PM8XXX_GPIO_BIAS_PD
#define PM8XXX_GPIO_BIAS_NP

/* GPIO registers */
#define SSBI_REG_ADDR_GPIO_BASE
#define SSBI_REG_ADDR_GPIO(n)

#define PM8XXX_BANK_WRITE

#define PM8XXX_MAX_GPIOS

#define PM8XXX_GPIO_PHYSICAL_OFFSET

/* custom pinconf parameters */
#define PM8XXX_QCOM_DRIVE_STRENGH
#define PM8XXX_QCOM_PULL_UP_STRENGTH

/**
 * struct pm8xxx_pin_data - dynamic configuration for a pin
 * @reg:               address of the control register
 * @power_source:      logical selected voltage source, mapping in static data
 *                     is used translate to register values
 * @mode:              operating mode for the pin (input/output)
 * @open_drain:        output buffer configured as open-drain (vs push-pull)
 * @output_value:      configured output value
 * @bias:              register view of configured bias
 * @pull_up_strength:  placeholder for selected pull up strength
 *                     only used to configure bias when pull up is selected
 * @output_strength:   selector of output-strength
 * @disable:           pin disabled / configured as tristate
 * @function:          pinmux selector
 * @inverted:          pin logic is inverted
 */
struct pm8xxx_pin_data {};

struct pm8xxx_gpio {};

static const struct pinconf_generic_params pm8xxx_gpio_bindings[] =;

#ifdef CONFIG_DEBUG_FS
static const struct pin_config_item pm8xxx_conf_items[ARRAY_SIZE(pm8xxx_gpio_bindings)] =;
#endif

static const char * const pm8xxx_groups[PM8XXX_MAX_GPIOS] =;

static const char * const pm8xxx_gpio_functions[] =;

static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl,
			    struct pm8xxx_pin_data *pin, int bank)
{}

static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl,
			     struct pm8xxx_pin_data *pin,
			     int bank,
			     u8 val)
{}

static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
{}

static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
					 unsigned group)
{}


static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
				 unsigned group,
				 const unsigned **pins,
				 unsigned *num_pins)
{}

static const struct pinctrl_ops pm8xxx_pinctrl_ops =;

static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
{}

static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
					    unsigned function)
{}

static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
				      unsigned function,
				      const char * const **groups,
				      unsigned * const num_groups)
{}

static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
				 unsigned function,
				 unsigned group)
{}

static const struct pinmux_ops pm8xxx_pinmux_ops =;

static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
				 unsigned int offset,
				 unsigned long *config)
{}

static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
				 unsigned int offset,
				 unsigned long *configs,
				 unsigned num_configs)
{}

static const struct pinconf_ops pm8xxx_pinconf_ops =;

static const struct pinctrl_desc pm8xxx_pinctrl_desc =;

static int pm8xxx_gpio_direction_input(struct gpio_chip *chip,
				       unsigned offset)
{}

static int pm8xxx_gpio_direction_output(struct gpio_chip *chip,
					unsigned offset,
					int value)
{}

static int pm8xxx_gpio_get(struct gpio_chip *chip, unsigned offset)
{}

static void pm8xxx_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{}

static int pm8xxx_gpio_of_xlate(struct gpio_chip *chip,
				const struct of_phandle_args *gpio_desc,
				u32 *flags)
{}


#ifdef CONFIG_DEBUG_FS

static void pm8xxx_gpio_dbg_show_one(struct seq_file *s,
				  struct pinctrl_dev *pctldev,
				  struct gpio_chip *chip,
				  unsigned offset,
				  unsigned gpio)
{}

static void pm8xxx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{}

#else
#define pm8xxx_gpio_dbg_show
#endif

static const struct gpio_chip pm8xxx_gpio_template =;

static int pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl,
			       struct pm8xxx_pin_data *pin)
{}

static void pm8xxx_irq_disable(struct irq_data *d)
{}

static void pm8xxx_irq_enable(struct irq_data *d)
{}

static const struct irq_chip pm8xxx_irq_chip =;

static int pm8xxx_domain_translate(struct irq_domain *domain,
				   struct irq_fwspec *fwspec,
				   unsigned long *hwirq,
				   unsigned int *type)
{}

static unsigned int pm8xxx_child_offset_to_irq(struct gpio_chip *chip,
					       unsigned int offset)
{}

static int pm8xxx_child_to_parent_hwirq(struct gpio_chip *chip,
					unsigned int child_hwirq,
					unsigned int child_type,
					unsigned int *parent_hwirq,
					unsigned int *parent_type)
{}

static const struct of_device_id pm8xxx_gpio_of_match[] =;
MODULE_DEVICE_TABLE(of, pm8xxx_gpio_of_match);

static int pm8xxx_gpio_probe(struct platform_device *pdev)
{}

static void pm8xxx_gpio_remove(struct platform_device *pdev)
{}

static struct platform_driver pm8xxx_gpio_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();