linux/drivers/pinctrl/qcom/pinctrl-sc8180x.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2020-2021, Linaro Ltd.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

static const char * const sc8180x_tiles[] =;

enum {};

/*
 * ACPI DSDT has one single memory resource for TLMM.  The offsets below are
 * used to locate different tiles for ACPI probe.
 */
struct tile_info {};

static const struct tile_info sc8180x_tile_info[] =;

#define REG_SIZE
#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)

#define UFS_RESET(pg_name)
static const struct pinctrl_pin_desc sc8180x_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum sc8180x_functions {};

static const char * const adsp_ext_groups[] =;

static const char * const agera_pll_groups[] =;

static const char * const aoss_cti_groups[] =;

static const char * const atest_char_groups[] =;

static const char * const atest_tsens2_groups[] =;

static const char * const atest_tsens_groups[] =;

static const char * const atest_usb0_groups[] =;

static const char * const atest_usb1_groups[] =;

static const char * const atest_usb2_groups[] =;

static const char * const atest_usb3_groups[] =;

static const char * const atest_usb4_groups[] =;

static const char * const audio_ref_groups[] =;

static const char * const btfm_slimbus_groups[] =;

static const char * const cam_mclk_groups[] =;

static const char * const cci_async_groups[] =;

static const char * const cci_i2c_groups[] =;

static const char * const cci_timer0_groups[] =;

static const char * const cci_timer1_groups[] =;

static const char * const cci_timer2_groups[] =;

static const char * const cci_timer3_groups[] =;

static const char * const cci_timer4_groups[] =;

static const char * const cci_timer5_groups[] =;

static const char * const cci_timer6_groups[] =;

static const char * const cci_timer7_groups[] =;

static const char * const cci_timer8_groups[] =;

static const char * const cci_timer9_groups[] =;

static const char * const cri_trng_groups[] =;

static const char * const dbg_out_groups[] =;

static const char * const ddr_bist_groups[] =;

static const char * const ddr_pxi_groups[] =;

static const char * const debug_hot_groups[] =;

static const char * const dp_hot_groups[] =;

static const char * const edp_hot_groups[] =;

static const char * const edp_lcd_groups[] =;

static const char * const emac_phy_groups[] =;

static const char * const emac_pps_groups[] =;

static const char * const gcc_gp1_groups[] =;

static const char * const gcc_gp2_groups[] =;

static const char * const gcc_gp3_groups[] =;

static const char * const gcc_gp4_groups[] =;

static const char * const gcc_gp5_groups[] =;

static const char * const gpio_groups[] =;

static const char * const gps_groups[] =;

static const char * const grfc_groups[] =;

static const char * const hs1_mi2s_groups[] =;

static const char * const hs2_mi2s_groups[] =;

static const char * const hs3_mi2s_groups[] =;

static const char * const jitter_bist_groups[] =;

static const char * const lpass_slimbus_groups[] =;

static const char * const m_voc_groups[] =;

static const char * const mdp_vsync0_groups[] =;

static const char * const mdp_vsync1_groups[] =;

static const char * const mdp_vsync2_groups[] =;

static const char * const mdp_vsync3_groups[] =;

static const char * const mdp_vsync4_groups[] =;

static const char * const mdp_vsync5_groups[] =;

static const char * const mdp_vsync_groups[] =;

static const char * const mss_lte_groups[] =;

static const char * const nav_pps_groups[] =;

static const char * const pa_indicator_groups[] =;

static const char * const pci_e0_groups[] =;

static const char * const pci_e1_groups[] =;

static const char * const pci_e2_groups[] =;

static const char * const pci_e3_groups[] =;

static const char * const phase_flag_groups[] =;

static const char * const pll_bist_groups[] =;

static const char * const pll_bypassnl_groups[] =;

static const char * const pll_reset_groups[] =;

static const char * const pri_mi2s_groups[] =;

static const char * const pri_mi2s_ws_groups[] =;

static const char * const prng_rosc_groups[] =;

static const char * const qdss_cti_groups[] =;

static const char * const qdss_gpio_groups[] =;

static const char * const qlink_groups[] =;

static const char * const qspi0_groups[] =;

static const char * const qspi0_clk_groups[] =;

static const char * const qspi0_cs_groups[] =;

static const char * const qspi1_groups[] =;

static const char * const qspi1_clk_groups[] =;

static const char * const qspi1_cs_groups[] =;

static const char * const qua_mi2s_groups[] =;

static const char * const qup0_groups[] =;

static const char * const qup10_groups[] =;

static const char * const qup11_groups[] =;

static const char * const qup12_groups[] =;

static const char * const qup13_groups[] =;

static const char * const qup14_groups[] =;

static const char * const qup15_groups[] =;

static const char * const qup16_groups[] =;

static const char * const qup17_groups[] =;

static const char * const qup18_groups[] =;

static const char * const qup19_groups[] =;

static const char * const qup1_groups[] =;

static const char * const qup2_groups[] =;

static const char * const qup3_groups[] =;

static const char * const qup4_groups[] =;

static const char * const qup5_groups[] =;

static const char * const qup6_groups[] =;

static const char * const qup7_groups[] =;

static const char * const qup8_groups[] =;

static const char * const qup9_groups[] =;

static const char * const qup_l4_groups[] =;

static const char * const qup_l5_groups[] =;

static const char * const qup_l6_groups[] =;

static const char * const rgmii_groups[] =;

static const char * const sd_write_groups[] =;

static const char * const sdc4_groups[] =;

static const char * const sdc4_clk_groups[] =;

static const char * const sdc4_cmd_groups[] =;

static const char * const sec_mi2s_groups[] =;

static const char * const sp_cmu_groups[] =;

static const char * const spkr_i2s_groups[] =;

static const char * const ter_mi2s_groups[] =;

static const char * const tgu_groups[] =;

static const char * const tsense_pwm1_groups[] =;

static const char * const tsense_pwm2_groups[] =;

static const char * const tsif1_groups[] =;

static const char * const tsif2_groups[] =;

static const char * const uim1_groups[] =;

static const char * const uim2_groups[] =;

static const char * const uim_batt_groups[] =;

static const char * const usb0_phy_groups[] =;

static const char * const usb1_phy_groups[] =;

static const char * const usb2phy_ac_groups[] =;

static const char * const vfr_1_groups[] =;

static const char * const vsense_trigger_groups[] =;

static const char * const wlan1_adc_groups[] =;

static const char * const wlan2_adc_groups[] =;

static const char * const wmss_reset_groups[] =;

static const struct pinfunction sc8180x_functions[] =;

/* Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sc8180x_groups[] =;

static const int sc8180x_acpi_reserved_gpios[] =;

static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] =;

static struct msm_pinctrl_soc_data sc8180x_pinctrl =;

static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl =;

/*
 * ACPI DSDT has one single memory resource for TLMM, which violates the
 * hardware layout of 3 separate tiles.  Let's split the memory resource into
 * 3 named ones, so that msm_pinctrl_probe() can map memory for ACPI in the
 * same way as for DT probe.
 */
static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev)
{}

static int sc8180x_pinctrl_probe(struct platform_device *pdev)
{}

static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] =;
MODULE_DEVICE_TABLE(acpi, sc8180x_pinctrl_acpi_match);

static const struct of_device_id sc8180x_pinctrl_of_match[] =;
MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match);

static struct platform_driver sc8180x_pinctrl_driver =;

static int __init sc8180x_pinctrl_init(void)
{}
arch_initcall(sc8180x_pinctrl_init);

static void __exit sc8180x_pinctrl_exit(void)
{}
module_exit(sc8180x_pinctrl_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();