linux/drivers/pinctrl/qcom/pinctrl-sdx65.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

#define REG_BASE …
#define REG_SIZE …
#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) …

#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) …

#define UFS_RESET(pg_name, offset) …

static const struct pinctrl_pin_desc sdx65_pins[] = …;

#define DECLARE_MSM_GPIO_PINS(pin) …
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);
DECLARE_MSM_GPIO_PINS(…);

static const unsigned int ufs_reset_pins[] = …;
static const unsigned int sdc1_rclk_pins[] = …;
static const unsigned int sdc1_clk_pins[] = …;
static const unsigned int sdc1_cmd_pins[] = …;
static const unsigned int sdc1_data_pins[] = …;

enum sdx65_functions { … };

static const char * const gpio_groups[] = …;
static const char * const uim2_data_groups[] = …;
static const char * const blsp_uart1_groups[] = …;
static const char * const ebi0_wrcdc_groups[] = …;
static const char * const uim2_present_groups[] = …;
static const char * const uim2_reset_groups[] = …;
static const char * const blsp_i2c1_groups[] = …;
static const char * const uim2_clk_groups[] = …;
static const char * const blsp_spi2_groups[] = …;
static const char * const blsp_uart2_groups[] = …;
static const char * const blsp_i2c2_groups[] = …;
static const char * const char_exec_groups[] = …;
static const char * const qdss_gpio_groups[] = …;
static const char * const blsp_spi3_groups[] = …;
static const char * const blsp_uart3_groups[] = …;
static const char * const ext_dbg_groups[] = …;
static const char * const ldo_en_groups[] = …;
static const char * const blsp_i2c3_groups[] = …;
static const char * const gcc_gp3_groups[] = …;
static const char * const pri_mi2s_ws_groups[] = …;
static const char * const pri_mi2s_groups[] = …;
static const char * const vsense_trigger_groups[] = …;
static const char * const native_tsens_groups[] = …;
static const char * const bimc_dte0_groups[] = …;
static const char * const bimc_dte1_groups[] = …;
static const char * const sec_mi2s_groups[] = …;
static const char * const blsp_spi4_groups[] = …;
static const char * const blsp_uart4_groups[] = …;
static const char * const qdss_cti_groups[] = …;
static const char * const blsp_i2c4_groups[] = …;
static const char * const gcc_gp1_groups[] = …;
static const char * const jitter_bist_groups[] = …;
static const char * const gcc_gp2_groups[] = …;
static const char * const pll_bist_groups[] = …;
static const char * const blsp_spi1_groups[] = …;
static const char * const adsp_ext_groups[] = …;
static const char * const qlink0_wmss_groups[] = …;
static const char * const native_tsense_groups[] = …;
static const char * const nav_gpio_groups[] = …;
static const char * const pll_ref_groups[] = …;
static const char * const pa_indicator_groups[] = …;
static const char * const qlink0_en_groups[] = …;
static const char * const qlink0_req_groups[] = …;
static const char * const dbg_out_groups[] = …;
static const char * const cri_trng_groups[] = …;
static const char * const prng_rosc_groups[] = …;
static const char * const cri_trng0_groups[] = …;
static const char * const cri_trng1_groups[] = …;
static const char * const coex_uart_groups[] = …;
static const char * const ddr_pxi0_groups[] = …;
static const char * const m_voc_groups[] = …;
static const char * const ddr_bist_groups[] = …;
static const char * const pci_e_groups[] = …;
static const char * const tgu_ch0_groups[] = …;
static const char * const pcie_clkreq_groups[] = …;
static const char * const native_char_groups[] = …;
static const char * const mgpi_clk_groups[] = …;
static const char * const qlink2_wmss_groups[] = …;
static const char * const i2s_mclk_groups[] = …;
static const char * const audio_ref_groups[] = …;
static const char * const ldo_update_groups[] = …;
static const char * const atest_char_groups[] = …;
static const char * const atest_char3_groups[] = …;
static const char * const atest_char2_groups[] = …;
static const char * const atest_char1_groups[] = …;
static const char * const uim1_data_groups[] = …;
static const char * const atest_char0_groups[] = …;
static const char * const uim1_present_groups[] = …;
static const char * const uim1_reset_groups[] = …;
static const char * const uim1_clk_groups[] = …;
static const char * const qlink2_en_groups[] = …;
static const char * const qlink1_en_groups[] = …;
static const char * const qlink1_req_groups[] = …;
static const char * const qlink1_wmss_groups[] = …;
static const char * const coex_uart2_groups[] = …;
static const char * const spmi_coex_groups[] = …;
static const char * const qlink2_req_groups[] = …;
static const char * const spmi_vgi_groups[] = …;
static const char * const gcc_plltest_groups[] = …;
static const char * const ebi2_lcd_groups[] = …;
static const char * const ebi2_a_groups[] = …;
static const char * const usb2phy_ac_groups[] = …;
static const char * const sdc1_tb_groups[] = …;

static const struct pinfunction sdx65_functions[] = …;

/* Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sdx65_groups[] = …;

static const struct msm_gpio_wakeirq_map sdx65_pdc_map[] = …;

static const struct msm_pinctrl_soc_data sdx65_pinctrl = …;

static int sdx65_pinctrl_probe(struct platform_device *pdev)
{ … }

static const struct of_device_id sdx65_pinctrl_of_match[] = …;

static struct platform_driver sdx65_pinctrl_driver = …;

static int __init sdx65_pinctrl_init(void)
{ … }
arch_initcall(sdx65_pinctrl_init);

static void __exit sdx65_pinctrl_exit(void)
{ … }
module_exit(sdx65_pinctrl_exit);

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_DEVICE_TABLE(of, sdx65_pinctrl_of_match);