linux/drivers/pinctrl/qcom/pinctrl-sm4450.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

#define REG_SIZE

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)

#define UFS_RESET(pg_name, offset)

#define QUP_I3C(qup_mode, qup_offset)


static const struct pinctrl_pin_desc sm4450_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc1_rclk_pins[] =;
static const unsigned int sdc1_clk_pins[] =;
static const unsigned int sdc1_cmd_pins[] =;
static const unsigned int sdc1_data_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum sm4450_functions {};

static const char * const gpio_groups[] =;
static const char * const atest_char_groups[] =;
static const char * const atest_usb0_groups[] =;
static const char * const audio_ref_clk_groups[] =;
static const char * const cam_mclk_groups[] =;
static const char * const cci_async_in0_groups[] =;
static const char * const cci_i2c_groups[] =;
static const char * const cci_groups[] =;
static const char * const cmu_rng_groups[] =;
static const char * const coex_uart1_rx_groups[] =;
static const char * const coex_uart1_tx_groups[] =;
static const char * const cri_trng_groups[] =;
static const char * const dbg_out_clk_groups[] =;
static const char * const ddr_bist_groups[] =;
static const char * const ddr_pxi0_test_groups[] =;
static const char * const ddr_pxi1_test_groups[] =;
static const char * const gcc_gp1_clk_groups[] =;
static const char * const gcc_gp2_clk_groups[] =;
static const char * const gcc_gp3_clk_groups[] =;
static const char * const host2wlan_sol_groups[] =;
static const char * const ibi_i3c_qup0_groups[] =;
static const char * const ibi_i3c_qup1_groups[] =;
static const char * const jitter_bist_ref_groups[] =;
static const char * const mdp_vsync0_out_groups[] =;
static const char * const mdp_vsync1_out_groups[] =;
static const char * const mdp_vsync2_out_groups[] =;
static const char * const mdp_vsync3_out_groups[] =;
static const char * const mdp_vsync_groups[] =;
static const char * const nav_groups[] =;
static const char * const pcie0_clk_req_groups[] =;
static const char * const phase_flag_groups[] =;
static const char * const pll_bist_sync_groups[] =;
static const char * const pll_clk_aux_groups[] =;
static const char * const prng_rosc_groups[] =;
static const char * const qdss_cti_trig0_groups[] =;
static const char * const qdss_cti_trig1_groups[] =;
static const char * const qdss_gpio_groups[] =;
static const char * const qlink0_enable_groups[] =;
static const char * const qlink0_request_groups[] =;
static const char * const qlink0_wmss_reset_groups[] =;
static const char * const qup0_se0_groups[] =;
static const char * const qup0_se1_groups[] =;
static const char * const qup0_se2_groups[] =;
static const char * const qup0_se3_groups[] =;
static const char * const qup0_se4_groups[] =;
static const char * const qup1_se0_groups[] =;
static const char * const qup1_se1_groups[] =;
static const char * const qup1_se2_groups[] =;
static const char * const qup1_se3_groups[] =;
static const char * const qup1_se4_groups[] =;
static const char * const sd_write_protect_groups[] =;
static const char * const tb_trig_sdc1_groups[] =;
static const char * const tb_trig_sdc2_groups[] =;
static const char * const tgu_ch0_trigout_groups[] =;
static const char * const tgu_ch1_trigout_groups[] =;
static const char * const tgu_ch2_trigout_groups[] =;
static const char * const tgu_ch3_trigout_groups[] =;
static const char * const tmess_prng_groups[] =;
static const char * const tsense_pwm1_out_groups[] =;
static const char * const tsense_pwm2_out_groups[] =;
static const char * const uim0_groups[] =;
static const char * const uim1_groups[] =;
static const char * const usb0_hs_ac_groups[] =;
static const char * const usb0_phy_ps_groups[] =;
static const char * const vfr_0_mira_groups[] =;
static const char * const vfr_0_mirb_groups[] =;
static const char * const vfr_1_groups[] =;
static const char * const vsense_trigger_mirnat_groups[] =;
static const char * const wlan1_adc_dtest0_groups[] =;
static const char * const wlan1_adc_dtest1_groups[] =;

static const struct pinfunction sm4450_functions[] =;

/*
 * Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sm4450_groups[] =;

static const struct msm_gpio_wakeirq_map sm4450_pdc_map[] =;

static const struct msm_pinctrl_soc_data sm4450_tlmm =;

static int sm4450_tlmm_probe(struct platform_device *pdev)
{}

static const struct of_device_id sm4450_tlmm_of_match[] =;

static struct platform_driver sm4450_tlmm_driver =;
MODULE_DEVICE_TABLE(of, sm4450_tlmm_of_match);

static int __init sm4450_tlmm_init(void)
{}
arch_initcall(sm4450_tlmm_init);

static void __exit sm4450_tlmm_exit(void)
{}
module_exit(sm4450_tlmm_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();