linux/drivers/pinctrl/qcom/pinctrl-sm8650.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2023, Linaro Limited
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

#define REG_SIZE

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10)

#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)

#define UFS_RESET(pg_name, ctl, io)

static const struct pinctrl_pin_desc sm8650_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum sm8650_functions {};

static const char *const gpio_groups[] =;

static const char * const egpio_groups[] =;

static const char * const aoss_cti_groups[] =;

static const char *const atest_char_groups[] =;

static const char *const atest_usb_groups[] =;

static const char *const audio_ext_mclk0_groups[] =;

static const char *const audio_ext_mclk1_groups[] =;

static const char *const audio_ref_clk_groups[] =;

static const char *const cam_aon_mclk2_groups[] =;

static const char *const cam_aon_mclk4_groups[] =;

static const char *const cam_mclk_groups[] =;

static const char *const cci_async_in_groups[] =;

static const char *const cci_i2c_scl_groups[] =;

static const char *const cci_i2c_sda_groups[] =;

static const char *const cci_timer_groups[] =;

static const char *const cmu_rng_groups[] =;

static const char *const coex_uart1_rx_groups[] =;

static const char *const coex_uart1_tx_groups[] =;

static const char *const coex_uart2_rx_groups[] =;

static const char *const coex_uart2_tx_groups[] =;

static const char *const cri_trng_groups[] =;

static const char *const dbg_out_clk_groups[] =;

static const char *const ddr_bist_complete_groups[] =;

static const char *const ddr_bist_fail_groups[] =;

static const char *const ddr_bist_start_groups[] =;

static const char *const ddr_bist_stop_groups[] =;

static const char *const ddr_pxi0_groups[] =;

static const char *const ddr_pxi1_groups[] =;

static const char *const ddr_pxi2_groups[] =;

static const char *const ddr_pxi3_groups[] =;

static const char *const do_not_groups[] =;

static const char *const dp_hot_groups[] =;

static const char *const gcc_gp1_groups[] =;

static const char *const gcc_gp2_groups[] =;

static const char *const gcc_gp3_groups[] =;

static const char *const gnss_adc0_groups[] =;

static const char *const gnss_adc1_groups[] =;

static const char *const i2chub0_se0_groups[] =;

static const char *const i2chub0_se1_groups[] =;

static const char *const i2chub0_se2_groups[] =;

static const char *const i2chub0_se3_groups[] =;

static const char *const i2chub0_se4_groups[] =;

static const char *const i2chub0_se5_groups[] =;

static const char *const i2chub0_se6_groups[] =;

static const char *const i2chub0_se7_groups[] =;

static const char *const i2chub0_se8_groups[] =;

static const char *const i2chub0_se9_groups[] =;

static const char *const i2s0_data0_groups[] =;

static const char *const i2s0_data1_groups[] =;

static const char *const i2s0_sck_groups[] =;

static const char *const i2s0_ws_groups[] =;

static const char *const i2s1_data0_groups[] =;

static const char *const i2s1_data1_groups[] =;

static const char *const i2s1_sck_groups[] =;

static const char *const i2s1_ws_groups[] =;

static const char *const ibi_i3c_groups[] =;

static const char *const jitter_bist_groups[] =;

static const char *const mdp_vsync_groups[] =;

static const char *const mdp_vsync0_out_groups[] =;

static const char *const mdp_vsync1_out_groups[] =;

static const char *const mdp_vsync2_out_groups[] =;

static const char *const mdp_vsync3_out_groups[] =;

static const char *const mdp_vsync_e_groups[] =;

static const char *const nav_gpio0_groups[] =;

static const char *const nav_gpio1_groups[] =;

static const char *const nav_gpio2_groups[] =;

static const char *const nav_gpio3_groups[] =;

static const char *const pcie0_clk_req_n_groups[] =;

static const char *const pcie1_clk_req_n_groups[] =;

static const char *const phase_flag_groups[] =;

static const char *const pll_bist_sync_groups[] =;

static const char *const pll_clk_aux_groups[] =;

static const char *const prng_rosc0_groups[] =;

static const char *const prng_rosc1_groups[] =;

static const char *const prng_rosc2_groups[] =;

static const char *const prng_rosc3_groups[] =;

static const char *const qdss_cti_groups[] =;

static const char *const qdss_gpio_groups[] =;

static const char *const qlink_big_enable_groups[] =;

static const char *const qlink_big_request_groups[] =;

static const char *const qlink_little_enable_groups[] =;

static const char *const qlink_little_request_groups[] =;

static const char *const qlink_wmss_groups[] =;

static const char *const qspi0_groups[] =;

static const char *const qspi1_groups[] =;

static const char *const qspi2_groups[] =;

static const char *const qspi3_groups[] =;

static const char *const qspi_clk_groups[] =;

static const char *const qspi_cs_groups[] =;

static const char *const qup1_se0_groups[] =;

static const char *const qup1_se1_groups[] =;

static const char *const qup1_se2_groups[] =;

static const char *const qup1_se3_groups[] =;

static const char *const qup1_se4_groups[] =;

static const char *const qup1_se5_groups[] =;

static const char *const qup1_se6_groups[] =;

static const char *const qup1_se7_groups[] =;

static const char *const qup2_se0_groups[] =;

static const char *const qup2_se1_groups[] =;

static const char *const qup2_se2_groups[] =;

static const char *const qup2_se3_groups[] =;

static const char *const qup2_se4_groups[] =;

static const char *const qup2_se5_groups[] =;

static const char *const qup2_se6_groups[] =;

static const char *const qup2_se7_groups[] =;

static const char *const sd_write_protect_groups[] =;

static const char *const sdc40_groups[] =;

static const char *const sdc41_groups[] =;

static const char *const sdc42_groups[] =;

static const char *const sdc43_groups[] =;

static const char *const sdc4_clk_groups[] =;

static const char *const sdc4_cmd_groups[] =;

static const char *const tb_trig_sdc2_groups[] =;

static const char *const tb_trig_sdc4_groups[] =;

static const char *const tgu_ch0_trigout_groups[] =;

static const char *const tgu_ch1_trigout_groups[] =;

static const char *const tgu_ch2_trigout_groups[] =;

static const char *const tgu_ch3_trigout_groups[] =;

static const char *const tmess_prng0_groups[] =;

static const char *const tmess_prng1_groups[] =;

static const char *const tmess_prng2_groups[] =;

static const char *const tmess_prng3_groups[] =;

static const char *const tsense_pwm1_groups[] =;

static const char *const tsense_pwm2_groups[] =;

static const char *const tsense_pwm3_groups[] =;

static const char *const uim0_clk_groups[] =;

static const char *const uim0_data_groups[] =;

static const char *const uim0_present_groups[] =;

static const char *const uim0_reset_groups[] =;

static const char *const uim1_clk_groups[] =;

static const char *const uim1_data_groups[] =;

static const char *const uim1_present_groups[] =;

static const char *const uim1_reset_groups[] =;

static const char *const usb1_hs_groups[] =;

static const char *const usb_phy_groups[] =;

static const char *const vfr_0_groups[] =;

static const char *const vfr_1_groups[] =;

static const char *const vsense_trigger_mirnat_groups[] =;

static const struct pinfunction sm8650_functions[] =;

/*
 * Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sm8650_groups[] =;

static const struct msm_gpio_wakeirq_map sm8650_pdc_map[] =;

static const struct msm_pinctrl_soc_data sm8650_tlmm =;

static int sm8650_tlmm_probe(struct platform_device *pdev)
{}

static const struct of_device_id sm8650_tlmm_of_match[] =;

static struct platform_driver sm8650_tlmm_driver =;

static int __init sm8650_tlmm_init(void)
{}
arch_initcall(sm8650_tlmm_init);

static void __exit sm8650_tlmm_exit(void)
{}
module_exit(sm8650_tlmm_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_DEVICE_TABLE(of, sm8650_tlmm_of_match);