linux/drivers/gpu/drm/i915/gvt/aperture_gm.c

/*
 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * Authors:
 *    Kevin Tian <[email protected]>
 *    Dexuan Cui
 *
 * Contributors:
 *    Pei Zhang <[email protected]>
 *    Min He <[email protected]>
 *    Niu Bing <[email protected]>
 *    Yulei Zhang <[email protected]>
 *    Zhenyu Wang <[email protected]>
 *    Zhi Wang <[email protected]>
 *
 */

#include "i915_drv.h"
#include "i915_reg.h"
#include "gt/intel_ggtt_fencing.h"
#include "gvt.h"

static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
{ … }

static int alloc_vgpu_gm(struct intel_vgpu *vgpu)
{ … }

static void free_vgpu_gm(struct intel_vgpu *vgpu)
{ … }

/**
 * intel_vgpu_write_fence - write fence registers owned by a vGPU
 * @vgpu: vGPU instance
 * @fence: vGPU fence register number
 * @value: Fence register value to be written
 *
 * This function is used to write fence registers owned by a vGPU. The vGPU
 * fence register number will be translated into HW fence register number.
 *
 */
void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
		u32 fence, u64 value)
{ … }

static void _clear_vgpu_fence(struct intel_vgpu *vgpu)
{ … }

static void free_vgpu_fence(struct intel_vgpu *vgpu)
{ … }

static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
{ … }

static void free_resource(struct intel_vgpu *vgpu)
{ … }

static int alloc_resource(struct intel_vgpu *vgpu,
		const struct intel_vgpu_config *conf)
{ … }

/**
 * intel_vgpu_free_resource() - free HW resource owned by a vGPU
 * @vgpu: a vGPU
 *
 * This function is used to free the HW resource owned by a vGPU.
 *
 */
void intel_vgpu_free_resource(struct intel_vgpu *vgpu)
{ … }

/**
 * intel_vgpu_reset_resource - reset resource state owned by a vGPU
 * @vgpu: a vGPU
 *
 * This function is used to reset resource state owned by a vGPU.
 *
 */
void intel_vgpu_reset_resource(struct intel_vgpu *vgpu)
{ … }

/**
 * intel_vgpu_alloc_resource() - allocate HW resource for a vGPU
 * @vgpu: vGPU
 * @conf: vGPU creation params
 *
 * This function is used to allocate HW resource for a vGPU. User specifies
 * the resource configuration through the creation params.
 *
 * Returns:
 * zero on success, negative error code if failed.
 *
 */
int intel_vgpu_alloc_resource(struct intel_vgpu *vgpu,
		const struct intel_vgpu_config *conf)
{ … }