linux/drivers/gpu/drm/xe/xe_guc_ads.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2022 Intel Corporation
 */

#include "xe_guc_ads.h"

#include <drm/drm_managed.h>

#include <generated/xe_wa_oob.h>

#include "abi/guc_actions_abi.h"
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
#include "regs/xe_guc_regs.h"
#include "xe_bo.h"
#include "xe_gt.h"
#include "xe_gt_ccs_mode.h"
#include "xe_gt_printk.h"
#include "xe_guc.h"
#include "xe_guc_ct.h"
#include "xe_hw_engine.h"
#include "xe_lrc.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_platform_types.h"
#include "xe_uc_fw.h"
#include "xe_wa.h"

/* Slack of a few additional entries per engine */
#define ADS_REGSET_EXTRA_MAX

static struct xe_guc *
ads_to_guc(struct xe_guc_ads *ads)
{}

static struct xe_gt *
ads_to_gt(struct xe_guc_ads *ads)
{}

static struct xe_device *
ads_to_xe(struct xe_guc_ads *ads)
{}

static struct iosys_map *
ads_to_map(struct xe_guc_ads *ads)
{}

/* UM Queue parameters: */
#define GUC_UM_QUEUE_SIZE
#define GUC_PAGE_RES_TIMEOUT_US

/*
 * The Additional Data Struct (ADS) has pointers for different buffers used by
 * the GuC. One single gem object contains the ADS struct itself (guc_ads) and
 * all the extra buffers indirectly linked via the ADS struct's entries.
 *
 * Layout of the ADS blob allocated for the GuC:
 *
 *      +---------------------------------------+ <== base
 *      | guc_ads                               |
 *      +---------------------------------------+
 *      | guc_policies                          |
 *      +---------------------------------------+
 *      | guc_gt_system_info                    |
 *      +---------------------------------------+
 *      | guc_engine_usage                      |
 *      +---------------------------------------+
 *      | guc_um_init_params                    |
 *      +---------------------------------------+ <== static
 *      | guc_mmio_reg[countA] (engine 0.0)     |
 *      | guc_mmio_reg[countB] (engine 0.1)     |
 *      | guc_mmio_reg[countC] (engine 1.0)     |
 *      |   ...                                 |
 *      +---------------------------------------+ <== dynamic
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 *      | golden contexts                       |
 *      +---------------------------------------+
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 *      | w/a KLVs                              |
 *      +---------------------------------------+
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 *      | capture lists                         |
 *      +---------------------------------------+
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 *      | UM queues                             |
 *      +---------------------------------------+
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 *      | private data                          |
 *      +---------------------------------------+
 *      | padding                               |
 *      +---------------------------------------+ <== 4K aligned
 */
struct __guc_ads_blob {} __packed;

#define ads_blob_read(ads_, field_)

#define ads_blob_write(ads_, field_, val_)

#define info_map_write(xe_, map_, field_, val_)

#define info_map_read(xe_, map_, field_)

static size_t guc_ads_regset_size(struct xe_guc_ads *ads)
{}

static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads)
{}

static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)
{}

static size_t guc_ads_capture_size(struct xe_guc_ads *ads)
{}

static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
{}

static size_t guc_ads_private_data_size(struct xe_guc_ads *ads)
{}

static size_t guc_ads_regset_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_golden_lrc_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
{}

static size_t guc_ads_size(struct xe_guc_ads *ads)
{}

static bool needs_wa_1607983814(struct xe_device *xe)
{}

static size_t calculate_regset_size(struct xe_gt *gt)
{}

static u32 engine_enable_mask(struct xe_gt *gt, enum xe_engine_class class)
{}

static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
{}

static void guc_waklv_enable_one_word(struct xe_guc_ads *ads,
				      enum xe_guc_klv_ids klv_id,
				      u32 value,
				      u32 *offset, u32 *remain)
{}

static void guc_waklv_enable_simple(struct xe_guc_ads *ads,
				    enum xe_guc_klv_ids klv_id, u32 *offset, u32 *remain)
{}

static void guc_waklv_init(struct xe_guc_ads *ads)
{}

static int calculate_waklv_size(struct xe_guc_ads *ads)
{}

#define MAX_GOLDEN_LRC_SIZE

int xe_guc_ads_init(struct xe_guc_ads *ads)
{}

/**
 * xe_guc_ads_init_post_hwconfig - initialize ADS post hwconfig load
 * @ads: Additional data structures object
 *
 * Recalcuate golden_lrc_size & regset_size as the number hardware engines may
 * have changed after the hwconfig was loaded. Also verify the new sizes fit in
 * the already allocated ADS buffer object.
 *
 * Return: 0 on success, negative error code on error.
 */
int xe_guc_ads_init_post_hwconfig(struct xe_guc_ads *ads)
{}

static void guc_policies_init(struct xe_guc_ads *ads)
{}

static void fill_engine_enable_masks(struct xe_gt *gt,
				     struct iosys_map *info_map)
{}

static void guc_prep_golden_lrc_null(struct xe_guc_ads *ads)
{}

static void guc_mapping_table_init_invalid(struct xe_gt *gt,
					   struct iosys_map *info_map)
{}

static void guc_mapping_table_init(struct xe_gt *gt,
				   struct iosys_map *info_map)
{}

static void guc_capture_list_init(struct xe_guc_ads *ads)
{}

static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,
				      struct iosys_map *regset_map,
				      struct xe_reg reg,
				      unsigned int n_entry)
{}

static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
					  struct iosys_map *regset_map,
					  struct xe_hw_engine *hwe)
{}

static void guc_mmio_reg_state_init(struct xe_guc_ads *ads)
{}

static void guc_um_init_params(struct xe_guc_ads *ads)
{}

static void guc_doorbell_init(struct xe_guc_ads *ads)
{}

/**
 * xe_guc_ads_populate_minimal - populate minimal ADS
 * @ads: Additional data structures object
 *
 * This function populates a minimal ADS that does not support submissions but
 * enough so the GuC can load and the hwconfig table can be read.
 */
void xe_guc_ads_populate_minimal(struct xe_guc_ads *ads)
{}

void xe_guc_ads_populate(struct xe_guc_ads *ads)
{}

static void guc_populate_golden_lrc(struct xe_guc_ads *ads)
{}

void xe_guc_ads_populate_post_load(struct xe_guc_ads *ads)
{}

static int guc_ads_action_update_policies(struct xe_guc_ads *ads, u32 policy_offset)
{}

/**
 * xe_guc_ads_scheduler_policy_toggle_reset - Toggle reset policy
 * @ads: Additional data structures object
 *
 * This function update the GuC's engine reset policy based on wedged.mode.
 *
 * Return: 0 on success, and negative error code otherwise.
 */
int xe_guc_ads_scheduler_policy_toggle_reset(struct xe_guc_ads *ads)
{}