linux/drivers/pinctrl/qcom/pinctrl-x1e80100.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

#define REG_SIZE

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)

#define UFS_RESET(pg_name, offset)

static const struct pinctrl_pin_desc x1e80100_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum x1e80100_functions {};

static const char * const gpio_groups[] =;

static const char * const RESOUT_GPIO_groups[] =;

static const char * const aon_cci_groups[] =;

static const char * const aoss_cti_groups[] =;

static const char * const atest_char_groups[] =;

static const char * const atest_char0_groups[] =;

static const char * const atest_char1_groups[] =;

static const char * const atest_char2_groups[] =;

static const char * const atest_char3_groups[] =;

static const char * const atest_usb_groups[] =;

static const char * const audio_ext_groups[] =;

static const char * const audio_ref_groups[] =;

static const char * const cam_aon_groups[] =;

static const char * const cam_mclk_groups[] =;

static const char * const cci_async_groups[] =;

static const char * const cci_i2c_groups[] =;

static const char * const cci_timer0_groups[] =;

static const char * const cci_timer1_groups[] =;

static const char * const cci_timer2_groups[] =;

static const char * const cci_timer3_groups[] =;

static const char * const cci_timer4_groups[] =;

static const char * const cmu_rng0_groups[] =;

static const char * const cmu_rng1_groups[] =;

static const char * const cmu_rng2_groups[] =;

static const char * const cmu_rng3_groups[] =;

static const char * const cri_trng_groups[] =;

static const char * const dbg_out_groups[] =;

static const char * const ddr_bist_groups[] =;

static const char * const ddr_pxi0_groups[] =;

static const char * const ddr_pxi1_groups[] =;

static const char * const ddr_pxi2_groups[] =;

static const char * const ddr_pxi3_groups[] =;

static const char * const ddr_pxi4_groups[] =;

static const char * const ddr_pxi5_groups[] =;

static const char * const ddr_pxi6_groups[] =;

static const char * const ddr_pxi7_groups[] =;

static const char * const edp0_hot_groups[] =;

static const char * const edp0_lcd_groups[] =;

static const char * const edp1_hot_groups[] =;

static const char * const edp1_lcd_groups[] =;

static const char * const eusb0_ac_groups[] =;

static const char * const eusb1_ac_groups[] =;

static const char * const eusb2_ac_groups[] =;

static const char * const eusb3_ac_groups[] =;

static const char * const eusb5_ac_groups[] =;

static const char * const eusb6_ac_groups[] =;

static const char * const gcc_gp1_groups[] =;

static const char * const gcc_gp2_groups[] =;

static const char * const gcc_gp3_groups[] =;

static const char * const i2s0_data0_groups[] =;

static const char * const i2s0_data1_groups[] =;

static const char * const i2s0_sck_groups[] =;

static const char * const i2s0_ws_groups[] =;

static const char * const i2s1_data0_groups[] =;

static const char * const i2s1_data1_groups[] =;

static const char * const i2s1_sck_groups[] =;

static const char * const i2s1_ws_groups[] =;

static const char * const ibi_i3c_groups[] =;

static const char * const jitter_bist_groups[] =;

static const char * const mdp_vsync0_groups[] =;

static const char * const mdp_vsync1_groups[] =;

static const char * const mdp_vsync2_groups[] =;

static const char * const mdp_vsync3_groups[] =;

static const char * const mdp_vsync4_groups[] =;

static const char * const mdp_vsync5_groups[] =;

static const char * const mdp_vsync6_groups[] =;

static const char * const mdp_vsync7_groups[] =;

static const char * const mdp_vsync8_groups[] =;

static const char * const pcie3_clk_groups[] =;

static const char * const pcie4_clk_groups[] =;

static const char * const pcie5_clk_groups[] =;

static const char * const pcie6a_clk_groups[] =;

static const char * const pcie6b_clk_groups[] =;

static const char * const phase_flag_groups[] =;

static const char * const pll_bist_groups[] =;

static const char * const pll_clk_groups[] =;

static const char * const prng_rosc0_groups[] =;

static const char * const prng_rosc1_groups[] =;

static const char * const prng_rosc2_groups[] =;

static const char * const prng_rosc3_groups[] =;

static const char * const qdss_cti_groups[] =;

static const char * const qdss_gpio_groups[] =;

static const char * const qspi00_groups[] =;

static const char * const qspi01_groups[] =;

static const char * const qspi02_groups[] =;

static const char * const qspi03_groups[] =;

static const char * const qspi0_clk_groups[] =;

static const char * const qspi0_cs0_groups[] =;

static const char * const qspi0_cs1_groups[] =;

static const char * const qup0_se0_groups[] =;

static const char * const qup0_se1_groups[] =;

static const char * const qup0_se2_groups[] =;

static const char * const qup0_se3_groups[] =;

static const char * const qup0_se4_groups[] =;

static const char * const qup0_se5_groups[] =;

static const char * const qup0_se6_groups[] =;

static const char * const qup0_se7_groups[] =;

static const char * const qup1_se0_groups[] =;

static const char * const qup1_se1_groups[] =;

static const char * const qup1_se2_groups[] =;

static const char * const qup1_se3_groups[] =;

static const char * const qup1_se4_groups[] =;

static const char * const qup1_se5_groups[] =;

static const char * const qup1_se6_groups[] =;

static const char * const qup1_se7_groups[] =;

static const char * const qup2_se0_groups[] =;

static const char * const qup2_se1_groups[] =;

static const char * const qup2_se2_groups[] =;

static const char * const qup2_se3_groups[] =;

static const char * const qup2_se4_groups[] =;

static const char * const qup2_se5_groups[] =;

static const char * const qup2_se6_groups[] =;

static const char * const qup2_se7_groups[] =;

static const char * const sd_write_groups[] =;

static const char * const sdc4_clk_groups[] =;

static const char * const sdc4_cmd_groups[] =;

static const char * const sdc4_data0_groups[] =;

static const char * const sdc4_data1_groups[] =;

static const char * const sdc4_data2_groups[] =;

static const char * const sdc4_data3_groups[] =;

static const char * const sys_throttle_groups[] =;

static const char * const tb_trig_groups[] =;

static const char * const tgu_ch0_groups[] =;

static const char * const tgu_ch1_groups[] =;

static const char * const tgu_ch2_groups[] =;

static const char * const tgu_ch3_groups[] =;

static const char * const tgu_ch4_groups[] =;

static const char * const tgu_ch5_groups[] =;

static const char * const tgu_ch6_groups[] =;

static const char * const tgu_ch7_groups[] =;

static const char * const tmess_prng0_groups[] =;

static const char * const tmess_prng1_groups[] =;

static const char * const tmess_prng2_groups[] =;

static const char * const tmess_prng3_groups[] =;

static const char * const tsense_pwm1_groups[] =;

static const char * const tsense_pwm2_groups[] =;

static const char * const tsense_pwm3_groups[] =;

static const char * const tsense_pwm4_groups[] =;

static const char * const usb0_dp_groups[] =;

static const char * const usb0_phy_groups[] =;

static const char * const usb0_sbrx_groups[] =;

static const char * const usb0_sbtx_groups[] =;

static const char * const usb1_dp_groups[] =;

static const char * const usb1_phy_groups[] =;

static const char * const usb1_sbrx_groups[] =;

static const char * const usb1_sbtx_groups[] =;

static const char * const usb2_dp_groups[] =;

static const char * const usb2_phy_groups[] =;

static const char * const usb2_sbrx_groups[] =;

static const char * const usb2_sbtx_groups[] =;

static const char * const vsense_trigger_groups[] =;

static const struct pinfunction x1e80100_functions[] =;

/*
 * Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup x1e80100_groups[] =;

static const struct msm_gpio_wakeirq_map x1e80100_pdc_map[] =;

static const struct msm_pinctrl_soc_data x1e80100_pinctrl =;

static int x1e80100_pinctrl_probe(struct platform_device *pdev)
{}

static const struct of_device_id x1e80100_pinctrl_of_match[] =;

static struct platform_driver x1e80100_pinctrl_driver =;

static int __init x1e80100_pinctrl_init(void)
{}
arch_initcall(x1e80100_pinctrl_init);

static void __exit x1e80100_pinctrl_exit(void)
{}
module_exit(x1e80100_pinctrl_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_DEVICE_TABLE(of, x1e80100_pinctrl_of_match);