linux/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

/*
 * Copyright 2022 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */
#include "priv.h"

#include <core/memory.h>
#include <subdev/mmu.h>

#include <nvfw/fw.h>
#include <nvfw/hs.h>

int
nvkm_falcon_fw_patch(struct nvkm_falcon_fw *fw)
{ … }

static void
nvkm_falcon_fw_dtor_sigs(struct nvkm_falcon_fw *fw)
{ … }

int
nvkm_falcon_fw_boot(struct nvkm_falcon_fw *fw, struct nvkm_subdev *user,
		    bool release, u32 *pmbox0, u32 *pmbox1, u32 mbox0_ok, u32 irqsclr)
{ … }

int
nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *fw, struct nvkm_falcon *falcon,
		       struct nvkm_vmm *vmm, struct nvkm_memory *inst)
{ … }

void
nvkm_falcon_fw_dtor(struct nvkm_falcon_fw *fw)
{ … }

static const struct nvkm_firmware_func
nvkm_falcon_fw_dma = …;

static const struct nvkm_firmware_func
nvkm_falcon_fw = …;

int
nvkm_falcon_fw_sign(struct nvkm_falcon_fw *fw, u32 sig_base_img, u32 sig_size, const u8 *sigs,
		    int sig_nr_prd, u32 sig_base_prd, int sig_nr_dbg, u32 sig_base_dbg)
{ … }

int
nvkm_falcon_fw_ctor(const struct nvkm_falcon_fw_func *func, const char *name,
		    struct nvkm_device *device, bool dma, const void *src, u32 len,
		    struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
{ … }

int
nvkm_falcon_fw_ctor_hs(const struct nvkm_falcon_fw_func *func, const char *name,
		       struct nvkm_subdev *subdev, const char *bl, const char *img, int ver,
		       struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
{ … }

int
nvkm_falcon_fw_ctor_hs_v2(const struct nvkm_falcon_fw_func *func, const char *name,
			  struct nvkm_subdev *subdev, const char *img, int ver,
			  struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
{ … }