/* SPDX-License-Identifier: MIT */ #ifndef __NVBIOS_PLL_H__ #define __NVBIOS_PLL_H__ /*XXX: kill me */ struct nvkm_pll_vals { … }; /* these match types in pll limits table version 0x40, * nvkm uses them on all chipsets internally where a * specific pll needs to be referenced, but the exact * register isn't known. */ enum nvbios_pll_type { … }; struct nvbios_pll { … }; int nvbios_pll_parse(struct nvkm_bios *, u32 type, struct nvbios_pll *); #endif