// SPDX-License-Identifier: GPL-2.0 /* * Combined GPIO and pin controller support for Renesas RZ/A2 (R7S9210) SoC * * Copyright (C) 2018 Chris Brandt */ /* * This pin controller/gpio combined driver supports Renesas devices of RZ/A2 * family. */ #include <linux/bitops.h> #include <linux/gpio/driver.h> #include <linux/io.h> #include <linux/module.h> #include <linux/mutex.h> #include <linux/of.h> #include <linux/pinctrl/pinmux.h> #include <linux/platform_device.h> #include "../core.h" #include "../pinmux.h" #define DRIVER_NAME … #define RZA2_PINS_PER_PORT … #define RZA2_PIN_ID_TO_PORT(id) … #define RZA2_PIN_ID_TO_PIN(id) … /* * Use 16 lower bits [15:0] for pin identifier * Use 16 higher bits [31:16] for pin mux function */ #define MUX_PIN_ID_MASK … #define MUX_FUNC_MASK … #define MUX_FUNC_OFFS … #define MUX_FUNC(pinconf) … static const char port_names[] = …; struct rza2_pinctrl_priv { … }; #define RZA2_PDR(port) … #define RZA2_PODR(port) … #define RZA2_PIDR(port) … #define RZA2_PMR(port) … #define RZA2_DSCR(port) … #define RZA2_PFS(port, pin) … #define RZA2_PWPR … #define RZA2_PFENET … #define RZA2_PPOC … #define RZA2_PHMOMO … #define RZA2_PCKIO … #define RZA2_PDR_INPUT … #define RZA2_PDR_OUTPUT … #define RZA2_PDR_MASK … #define PWPR_B0WI … #define PWPR_PFSWE … #define PFS_ISEL … static void rza2_set_pin_function(void __iomem *pfc_base, u8 port, u8 pin, u8 func) { … } static void rza2_pin_to_gpio(void __iomem *pfc_base, unsigned int offset, u8 dir) { … } static int rza2_chip_get_direction(struct gpio_chip *chip, unsigned int offset) { … } static int rza2_chip_direction_input(struct gpio_chip *chip, unsigned int offset) { … } static int rza2_chip_get(struct gpio_chip *chip, unsigned int offset) { … } static void rza2_chip_set(struct gpio_chip *chip, unsigned int offset, int value) { … } static int rza2_chip_direction_output(struct gpio_chip *chip, unsigned int offset, int val) { … } static const char * const rza2_gpio_names[] = …; static struct gpio_chip chip = …; static int rza2_gpio_register(struct rza2_pinctrl_priv *priv) { … } static int rza2_pinctrl_register(struct rza2_pinctrl_priv *priv) { … } /* * For each DT node, create a single pin mapping. That pin mapping will only * contain a single group of pins, and that group of pins will only have a * single function that can be selected. */ static int rza2_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, unsigned int *num_maps) { … } static void rza2_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned int num_maps) { … } static const struct pinctrl_ops rza2_pinctrl_ops = …; static int rza2_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, unsigned int group) { … } static const struct pinmux_ops rza2_pinmux_ops = …; static int rza2_pinctrl_probe(struct platform_device *pdev) { … } static const struct of_device_id rza2_pinctrl_of_match[] = …; static struct platform_driver rza2_pinctrl_driver = …; static int __init rza2_pinctrl_init(void) { … } core_initcall(rza2_pinctrl_init); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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