// SPDX-License-Identifier: GPL-2.0+ // // Exynos ARMv8 specific support for Samsung pinctrl/gpiolib driver // with eint support. // // Copyright (c) 2012 Samsung Electronics Co., Ltd. // http://www.samsung.com // Copyright (c) 2012 Linaro Ltd // http://www.linaro.org // Copyright (c) 2017 Krzysztof Kozlowski <[email protected]> // // This file contains the Samsung Exynos specific information required by the // the Samsung pinctrl/gpiolib driver. It also includes the implementation of // external gpio and wakeup interrupt support. #include <linux/slab.h> #include <linux/soc/samsung/exynos-regs-pmu.h> #include "pinctrl-samsung.h" #include "pinctrl-exynos.h" static const struct samsung_pin_bank_type bank_type_off = …; static const struct samsung_pin_bank_type bank_type_alive = …; /* Exynos5433 has the 4bit widths for PINCFG_TYPE_DRV bitfields. */ static const struct samsung_pin_bank_type exynos5433_bank_type_off = …; static const struct samsung_pin_bank_type exynos5433_bank_type_alive = …; /* * Bank type for non-alive type. Bit fields: * CON: 4, DAT: 1, PUD: 4, DRV: 4, CONPDN: 2, PUDPDN: 4 */ static const struct samsung_pin_bank_type exynos850_bank_type_off = …; /* * Bank type for alive type. Bit fields: * CON: 4, DAT: 1, PUD: 4, DRV: 4 */ static const struct samsung_pin_bank_type exynos850_bank_type_alive = …; /* Pad retention control code for accessing PMU regmap */ static atomic_t exynos_shared_retention_refcnt; /* pin banks of exynos5433 pin-controller - ALIVE */ static const struct samsung_pin_bank_data exynos5433_pin_banks0[] __initconst = …; /* pin banks of exynos5433 pin-controller - AUD */ static const struct samsung_pin_bank_data exynos5433_pin_banks1[] __initconst = …; /* pin banks of exynos5433 pin-controller - CPIF */ static const struct samsung_pin_bank_data exynos5433_pin_banks2[] __initconst = …; /* pin banks of exynos5433 pin-controller - eSE */ static const struct samsung_pin_bank_data exynos5433_pin_banks3[] __initconst = …; /* pin banks of exynos5433 pin-controller - FINGER */ static const struct samsung_pin_bank_data exynos5433_pin_banks4[] __initconst = …; /* pin banks of exynos5433 pin-controller - FSYS */ static const struct samsung_pin_bank_data exynos5433_pin_banks5[] __initconst = …; /* pin banks of exynos5433 pin-controller - IMEM */ static const struct samsung_pin_bank_data exynos5433_pin_banks6[] __initconst = …; /* pin banks of exynos5433 pin-controller - NFC */ static const struct samsung_pin_bank_data exynos5433_pin_banks7[] __initconst = …; /* pin banks of exynos5433 pin-controller - PERIC */ static const struct samsung_pin_bank_data exynos5433_pin_banks8[] __initconst = …; /* pin banks of exynos5433 pin-controller - TOUCH */ static const struct samsung_pin_bank_data exynos5433_pin_banks9[] __initconst = …; /* PMU pin retention groups registers for Exynos5433 (without audio & fsys) */ static const u32 exynos5433_retention_regs[] = …; static const struct samsung_retention_data exynos5433_retention_data __initconst = …; /* PMU retention control for audio pins can be tied to audio pin bank */ static const u32 exynos5433_audio_retention_regs[] = …; static const struct samsung_retention_data exynos5433_audio_retention_data __initconst = …; /* PMU retention control for mmc pins can be tied to fsys pin bank */ static const u32 exynos5433_fsys_retention_regs[] = …; static const struct samsung_retention_data exynos5433_fsys_retention_data __initconst = …; /* * Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes * ten gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos5433_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos5433_of_data __initconst = …; /* pin banks of exynos7 pin-controller - ALIVE */ static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = …; /* pin banks of exynos7 pin-controller - BUS0 */ static const struct samsung_pin_bank_data exynos7_pin_banks1[] __initconst = …; /* pin banks of exynos7 pin-controller - NFC */ static const struct samsung_pin_bank_data exynos7_pin_banks2[] __initconst = …; /* pin banks of exynos7 pin-controller - TOUCH */ static const struct samsung_pin_bank_data exynos7_pin_banks3[] __initconst = …; /* pin banks of exynos7 pin-controller - FF */ static const struct samsung_pin_bank_data exynos7_pin_banks4[] __initconst = …; /* pin banks of exynos7 pin-controller - ESE */ static const struct samsung_pin_bank_data exynos7_pin_banks5[] __initconst = …; /* pin banks of exynos7 pin-controller - FSYS0 */ static const struct samsung_pin_bank_data exynos7_pin_banks6[] __initconst = …; /* pin banks of exynos7 pin-controller - FSYS1 */ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = …; /* pin banks of exynos7 pin-controller - BUS1 */ static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = …; static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = …; static const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos7_of_data __initconst = …; /* pin banks of exynos7885 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynos7885_pin_banks0[] __initconst = …; /* pin banks of exynos7885 pin-controller 1 (DISPAUD) */ static const struct samsung_pin_bank_data exynos7885_pin_banks1[] __initconst = …; /* pin banks of exynos7885 pin-controller 2 (FSYS) */ static const struct samsung_pin_bank_data exynos7885_pin_banks2[] __initconst = …; /* pin banks of exynos7885 pin-controller 3 (TOP) */ static const struct samsung_pin_bank_data exynos7885_pin_banks3[] __initconst = …; static const struct samsung_pin_ctrl exynos7885_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos7885_of_data __initconst = …; /* pin banks of exynos850 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynos850_pin_banks0[] __initconst = …; /* pin banks of exynos850 pin-controller 1 (CMGP) */ static const struct samsung_pin_bank_data exynos850_pin_banks1[] __initconst = …; /* pin banks of exynos850 pin-controller 2 (AUD) */ static const struct samsung_pin_bank_data exynos850_pin_banks2[] __initconst = …; /* pin banks of exynos850 pin-controller 3 (HSI) */ static const struct samsung_pin_bank_data exynos850_pin_banks3[] __initconst = …; /* pin banks of exynos850 pin-controller 4 (CORE) */ static const struct samsung_pin_bank_data exynos850_pin_banks4[] __initconst = …; /* pin banks of exynos850 pin-controller 5 (PERI) */ static const struct samsung_pin_bank_data exynos850_pin_banks5[] __initconst = …; static const struct samsung_pin_ctrl exynos850_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos850_of_data __initconst = …; /* pin banks of exynosautov9 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = …; /* pin banks of exynosautov9 pin-controller 1 (AUD) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks1[] __initconst = …; /* pin banks of exynosautov9 pin-controller 2 (FSYS0) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks2[] __initconst = …; /* pin banks of exynosautov9 pin-controller 3 (FSYS1) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks3[] __initconst = …; /* pin banks of exynosautov9 pin-controller 4 (FSYS2) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks4[] __initconst = …; /* pin banks of exynosautov9 pin-controller 5 (PERIC0) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks5[] __initconst = …; /* pin banks of exynosautov9 pin-controller 6 (PERIC1) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks6[] __initconst = …; static const struct samsung_pin_ctrl exynosautov9_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynosautov9_of_data __initconst = …; /* pin banks of exynosautov920 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks0[] = …; /* pin banks of exynosautov920 pin-controller 1 (AUD) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks1[] = …; /* pin banks of exynosautov920 pin-controller 2 (HSI0) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks2[] = …; /* pin banks of exynosautov920 pin-controller 3 (HSI1) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks3[] = …; /* pin banks of exynosautov920 pin-controller 4 (HSI2) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks4[] = …; /* pin banks of exynosautov920 pin-controller 5 (HSI2UFS) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks5[] = …; /* pin banks of exynosautov920 pin-controller 6 (PERIC0) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks6[] = …; /* pin banks of exynosautov920 pin-controller 7 (PERIC1) */ static const struct samsung_pin_bank_data exynosautov920_pin_banks7[] = …; static const struct samsung_retention_data exynosautov920_retention_data __initconst = …; static const struct samsung_pin_ctrl exynosautov920_pin_ctrl[] = …; const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst = …; /* * Pinctrl driver data for Tesla FSD SoC. FSD SoC includes three * gpio/pin-mux/pinconfig controllers. */ /* pin banks of FSD pin-controller 0 (FSYS) */ static const struct samsung_pin_bank_data fsd_pin_banks0[] __initconst = …; /* pin banks of FSD pin-controller 1 (PERIC) */ static const struct samsung_pin_bank_data fsd_pin_banks1[] __initconst = …; /* pin banks of FSD pin-controller 2 (PMU) */ static const struct samsung_pin_bank_data fsd_pin_banks2[] __initconst = …; static const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data fsd_of_data __initconst = …; /* pin banks of gs101 pin-controller (ALIVE) */ static const struct samsung_pin_bank_data gs101_pin_alive[] = …; /* pin banks of gs101 pin-controller (FAR_ALIVE) */ static const struct samsung_pin_bank_data gs101_pin_far_alive[] = …; /* pin banks of gs101 pin-controller (GSACORE) */ static const struct samsung_pin_bank_data gs101_pin_gsacore[] = …; /* pin banks of gs101 pin-controller (GSACTRL) */ static const struct samsung_pin_bank_data gs101_pin_gsactrl[] = …; /* pin banks of gs101 pin-controller (PERIC0) */ static const struct samsung_pin_bank_data gs101_pin_peric0[] = …; /* pin banks of gs101 pin-controller (PERIC1) */ static const struct samsung_pin_bank_data gs101_pin_peric1[] = …; /* pin banks of gs101 pin-controller (HSI1) */ static const struct samsung_pin_bank_data gs101_pin_hsi1[] = …; /* pin banks of gs101 pin-controller (HSI2) */ static const struct samsung_pin_bank_data gs101_pin_hsi2[] = …; static const struct samsung_pin_ctrl gs101_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data gs101_of_data __initconst = …;
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