/* SPDX-License-Identifier: GPL-2.0+ */ /* * Exynos specific definitions for Samsung pinctrl and gpiolib driver. * * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * Copyright (c) 2012 Linaro Ltd * http://www.linaro.org * * This file contains the Exynos specific definitions for the Samsung * pinctrl/gpiolib interface drivers. * * Author: Thomas Abraham <[email protected]> */ #ifndef __PINCTRL_SAMSUNG_EXYNOS_H #define __PINCTRL_SAMSUNG_EXYNOS_H /* Values for the pin CON register */ #define EXYNOS_PIN_CON_FUNC_EINT … /* External GPIO and wakeup interrupt related definitions */ #define EXYNOS_GPIO_ECON_OFFSET … #define EXYNOS_GPIO_EFLTCON_OFFSET … #define EXYNOS_GPIO_EMASK_OFFSET … #define EXYNOS_GPIO_EPEND_OFFSET … #define EXYNOS_WKUP_ECON_OFFSET … #define EXYNOS_WKUP_EMASK_OFFSET … #define EXYNOS_WKUP_EPEND_OFFSET … #define EXYNOS7_WKUP_ECON_OFFSET … #define EXYNOS7_WKUP_EMASK_OFFSET … #define EXYNOS7_WKUP_EPEND_OFFSET … #define EXYNOS_SVC_OFFSET … #define EXYNOSAUTO_SVC_OFFSET … /* helpers to access interrupt service register */ #define EXYNOS_SVC_GROUP_SHIFT … #define EXYNOS_SVC_GROUP_MASK … #define EXYNOS_SVC_NUM_MASK … #define EXYNOS_SVC_GROUP(x) … /* Exynos specific external interrupt trigger types */ #define EXYNOS_EINT_LEVEL_LOW … #define EXYNOS_EINT_LEVEL_HIGH … #define EXYNOS_EINT_EDGE_FALLING … #define EXYNOS_EINT_EDGE_RISING … #define EXYNOS_EINT_EDGE_BOTH … #define EXYNOS_EINT_CON_MASK … #define EXYNOS_EINT_CON_LEN … #define EXYNOS_EINT_MAX_PER_BANK … #define EXYNOS_EINT_NR_WKUP_EINT #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) … #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) … #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) … #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) … #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) … #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) … \ #define EXYNOS850_PIN_BANK_EINTN(pins, reg, id) … #define EXYNOS850_PIN_BANK_EINTG(pins, reg, id, offs) … #define EXYNOS850_PIN_BANK_EINTW(pins, reg, id, offs) … #define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, con_offs, mask_offs, pend_offs) … #define EXYNOSV920_PIN_BANK_EINTW(pins, reg, id, con_offs, mask_offs, pend_offs) … /** * struct exynos_weint_data: irq specific data for all the wakeup interrupts * generated by the external wakeup interrupt controller. * @irq: interrupt number within the domain. * @bank: bank responsible for this interrupt */ struct exynos_weint_data { … }; /** * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts * generated by the external wakeup interrupt controller. * @nr_banks: count of banks being part of the mux * @banks: array of banks being part of the mux */ struct exynos_muxed_weint_data { … }; int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d); int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d); void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata); void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata); struct samsung_retention_ctrl * exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata, const struct samsung_retention_data *data); #endif /* __PINCTRL_SAMSUNG_EXYNOS_H */
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