// SPDX-License-Identifier: GPL-2.0+ // // S3C64xx specific support for pinctrl-samsung driver. // // Copyright (c) 2013 Tomasz Figa <[email protected]> // // Based on pinctrl-exynos.c, please see the file for original copyrights. // // This file contains the Samsung S3C64xx specific information required by the // the Samsung pinctrl/gpiolib driver. It also includes the implementation of // external gpio and wakeup interrupt support. #include <linux/init.h> #include <linux/device.h> #include <linux/interrupt.h> #include <linux/irqdomain.h> #include <linux/irq.h> #include <linux/of_irq.h> #include <linux/io.h> #include <linux/irqchip/chained_irq.h> #include <linux/slab.h> #include <linux/err.h> #include "pinctrl-samsung.h" #define NUM_EINT0 … #define NUM_EINT0_IRQ … #define EINT_MAX_PER_REG … #define EINT_MAX_PER_GROUP … /* External GPIO and wakeup interrupt related definitions */ #define SVC_GROUP_SHIFT … #define SVC_GROUP_MASK … #define SVC_NUM_MASK … #define SVC_GROUP(x) … #define EINT12CON_REG … #define EINT12MASK_REG … #define EINT12PEND_REG … #define EINT_OFFS(i) … #define EINT_GROUP(i) … #define EINT_REG(g) … #define EINTCON_REG(i) … #define EINTMASK_REG(i) … #define EINTPEND_REG(i) … #define SERVICE_REG … #define SERVICEPEND_REG … #define EINT0CON0_REG … #define EINT0MASK_REG … #define EINT0PEND_REG … /* S3C64xx specific external interrupt trigger types */ #define EINT_LEVEL_LOW … #define EINT_LEVEL_HIGH … #define EINT_EDGE_FALLING … #define EINT_EDGE_RISING … #define EINT_EDGE_BOTH … #define EINT_CON_MASK … #define EINT_CON_LEN … #define S3C_PIN_PULL_DISABLE … #define S3C_PIN_PULL_DOWN … #define S3C_PIN_PULL_UP … static const struct samsung_pin_bank_type bank_type_4bit_off = …; static const struct samsung_pin_bank_type bank_type_4bit_alive = …; static const struct samsung_pin_bank_type bank_type_4bit2_off = …; static const struct samsung_pin_bank_type bank_type_4bit2_alive = …; static const struct samsung_pin_bank_type bank_type_2bit_off = …; static const struct samsung_pin_bank_type bank_type_2bit_alive = …; #define PIN_BANK_4BIT(pins, reg, id) … #define PIN_BANK_4BIT_EINTG(pins, reg, id, eoffs) … #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) … #define PIN_BANK_4BIT2_EINTG(pins, reg, id, eoffs) … #define PIN_BANK_4BIT2_EINTW(pins, reg, id, eoffs, emask) … #define PIN_BANK_4BIT2_ALIVE(pins, reg, id) … #define PIN_BANK_2BIT(pins, reg, id) … #define PIN_BANK_2BIT_EINTG(pins, reg, id, eoffs, emask) … #define PIN_BANK_2BIT_EINTW(pins, reg, id, eoffs) … /** * struct s3c64xx_eint0_data - EINT0 common data * @drvdata: pin controller driver data * @domains: IRQ domains of particular EINT0 interrupts * @pins: pin offsets inside of banks of particular EINT0 interrupts */ struct s3c64xx_eint0_data { … }; /** * struct s3c64xx_eint0_domain_data - EINT0 per-domain data * @bank: pin bank related to the domain * @eints: EINT0 interrupts related to the domain */ struct s3c64xx_eint0_domain_data { … }; /** * struct s3c64xx_eint_gpio_data - GPIO EINT data * @drvdata: pin controller driver data * @domains: array of domains related to EINT interrupt groups */ struct s3c64xx_eint_gpio_data { … }; /* * Common functions for S3C64xx EINT configuration */ static int s3c64xx_irq_get_trigger(unsigned int type) { … } static void s3c64xx_pud_value_init(struct samsung_pinctrl_drv_data *drvdata) { … } static void s3c64xx_irq_set_handler(struct irq_data *d, unsigned int type) { … } static void s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d, struct samsung_pin_bank *bank, int pin) { … } /* * Functions for EINT GPIO configuration (EINT groups 1-9) */ static inline void s3c64xx_gpio_irq_set_mask(struct irq_data *irqd, bool mask) { … } static void s3c64xx_gpio_irq_unmask(struct irq_data *irqd) { … } static void s3c64xx_gpio_irq_mask(struct irq_data *irqd) { … } static void s3c64xx_gpio_irq_ack(struct irq_data *irqd) { … } static int s3c64xx_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) { … } /* * irq_chip for gpio interrupts. */ static struct irq_chip s3c64xx_gpio_irq_chip = …; static int s3c64xx_gpio_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { … } /* * irq domain callbacks for external gpio interrupt controller. */ static const struct irq_domain_ops s3c64xx_gpio_irqd_ops = …; static void s3c64xx_eint_gpio_irq(struct irq_desc *desc) { … } /** * s3c64xx_eint_gpio_init() - setup handling of external gpio interrupts. * @d: driver data of samsung pinctrl driver. */ static int s3c64xx_eint_gpio_init(struct samsung_pinctrl_drv_data *d) { … } /* * Functions for configuration of EINT0 wake-up interrupts */ static inline void s3c64xx_eint0_irq_set_mask(struct irq_data *irqd, bool mask) { … } static void s3c64xx_eint0_irq_unmask(struct irq_data *irqd) { … } static void s3c64xx_eint0_irq_mask(struct irq_data *irqd) { … } static void s3c64xx_eint0_irq_ack(struct irq_data *irqd) { … } static int s3c64xx_eint0_irq_set_type(struct irq_data *irqd, unsigned int type) { … } /* * irq_chip for wakeup interrupts */ static struct irq_chip s3c64xx_eint0_irq_chip = …; static inline void s3c64xx_irq_demux_eint(struct irq_desc *desc, u32 range) { … } static void s3c64xx_demux_eint0_3(struct irq_desc *desc) { … } static void s3c64xx_demux_eint4_11(struct irq_desc *desc) { … } static void s3c64xx_demux_eint12_19(struct irq_desc *desc) { … } static void s3c64xx_demux_eint20_27(struct irq_desc *desc) { … } static irq_flow_handler_t s3c64xx_eint0_handlers[NUM_EINT0_IRQ] = …; static int s3c64xx_eint0_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { … } /* * irq domain callbacks for external wakeup interrupt controller. */ static const struct irq_domain_ops s3c64xx_eint0_irqd_ops = …; /* list of external wakeup controllers supported */ static const struct of_device_id s3c64xx_eint0_irq_ids[] = …; /** * s3c64xx_eint_eint0_init() - setup handling of external wakeup interrupts. * @d: driver data of samsung pinctrl driver. */ static int s3c64xx_eint_eint0_init(struct samsung_pinctrl_drv_data *d) { … } /* pin banks of s3c64xx pin-controller 0 */ static const struct samsung_pin_bank_data s3c64xx_pin_banks0[] __initconst = …; /* * Samsung pinctrl driver data for S3C64xx SoC. S3C64xx SoC includes * one gpio/pin-mux/pinconfig controller. */ static const struct samsung_pin_ctrl s3c64xx_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data s3c64xx_of_data __initconst = …;
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