/* SPDX-License-Identifier: GPL-2.0-only */ /* * GPIO driver for AMD * * Copyright (c) 2014,2015 Ken Xue <[email protected]> * Jeff Wu <[email protected]> */ #ifndef _PINCTRL_AMD_H #define _PINCTRL_AMD_H #define AMD_GPIO_PINS_PER_BANK … #define AMD_GPIO_PINS_BANK0 … #define AMD_GPIO_PINS_BANK1 … #define AMD_GPIO_PINS_BANK2 … #define AMD_GPIO_PINS_BANK3 … #define WAKE_INT_MASTER_REG … #define INTERNAL_GPIO0_DEBOUNCE … #define EOI_MASK … #define WAKE_INT_STATUS_REG0 … #define WAKE_INT_STATUS_REG1 … #define DB_TMR_OUT_OFF … #define DB_TMR_OUT_UNIT_OFF … #define DB_CNTRL_OFF … #define DB_TMR_LARGE_OFF … #define LEVEL_TRIG_OFF … #define ACTIVE_LEVEL_OFF … #define INTERRUPT_ENABLE_OFF … #define INTERRUPT_MASK_OFF … #define WAKE_CNTRL_OFF_S0I3 … #define WAKE_CNTRL_OFF_S3 … #define WAKE_CNTRL_OFF_S4 … #define PIN_STS_OFF … #define DRV_STRENGTH_SEL_OFF … #define PULL_UP_ENABLE_OFF … #define PULL_DOWN_ENABLE_OFF … #define OUTPUT_VALUE_OFF … #define OUTPUT_ENABLE_OFF … #define SW_CNTRL_IN_OFF … #define SW_CNTRL_EN_OFF … #define WAKECNTRL_Z_OFF … #define INTERRUPT_STS_OFF … #define WAKE_STS_OFF … #define DB_TMR_OUT_MASK … #define DB_CNTRl_MASK … #define ACTIVE_LEVEL_MASK … #define DRV_STRENGTH_SEL_MASK … #define ACTIVE_LEVEL_HIGH … #define ACTIVE_LEVEL_LOW … #define ACTIVE_LEVEL_BOTH … #define DB_TYPE_NO_DEBOUNCE … #define DB_TYPE_PRESERVE_LOW_GLITCH … #define DB_TYPE_PRESERVE_HIGH_GLITCH … #define DB_TYPE_REMOVE_GLITCH … #define EDGE_TRAGGER … #define LEVEL_TRIGGER … #define ACTIVE_HIGH … #define ACTIVE_LOW … #define BOTH_EADGE … #define ENABLE_INTERRUPT … #define DISABLE_INTERRUPT … #define ENABLE_INTERRUPT_MASK … #define DISABLE_INTERRUPT_MASK … #define CLR_INTR_STAT … #define NSELECTS … #define FUNCTION_MASK … #define FUNCTION_INVALID … #define WAKE_SOURCE … struct amd_function { … }; struct amd_gpio { … }; /* KERNCZ configuration*/ static const struct pinctrl_pin_desc kerncz_pins[] = …; #define AMD_PINS(...) … enum amd_functions { … }; #define AMD_PINCTRL_FUNC_GRP(_number, _func) … static const struct pingroup kerncz_groups[] = …; #define AMD_PMUX_FUNC(_number) … static const struct amd_function pmx_functions[] = …; #endif
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