// SPDX-License-Identifier: GPL-2.0-or-later /* * Microsemi/Microchip SoCs serial gpio driver * * Author: Lars Povlsen <[email protected]> * * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. */ #include <linux/bitfield.h> #include <linux/bits.h> #include <linux/clk.h> #include <linux/gpio/driver.h> #include <linux/io.h> #include <linux/mfd/ocelot.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/property.h> #include <linux/regmap.h> #include <linux/reset.h> #include <linux/spinlock.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinmux.h> #include "core.h" #include "pinconf.h" #define SGPIO_BITS_PER_WORD … #define SGPIO_MAX_BITS … #define SGPIO_SRC_BITS … enum { … }; enum { … }; enum { … }; struct sgpio_properties { … }; #define SGPIO_LUTON_AUTO_REPEAT … #define SGPIO_LUTON_PORT_WIDTH … #define SGPIO_LUTON_CLK_FREQ … #define SGPIO_LUTON_BIT_SOURCE … #define SGPIO_OCELOT_AUTO_REPEAT … #define SGPIO_OCELOT_SINGLE_SHOT … #define SGPIO_OCELOT_PORT_WIDTH … #define SGPIO_OCELOT_CLK_FREQ … #define SGPIO_OCELOT_BIT_SOURCE … #define SGPIO_SPARX5_AUTO_REPEAT … #define SGPIO_SPARX5_SINGLE_SHOT … #define SGPIO_SPARX5_PORT_WIDTH … #define SGPIO_SPARX5_CLK_FREQ … #define SGPIO_SPARX5_BIT_SOURCE … #define SGPIO_MASTER_INTR_ENA … #define SGPIO_INT_TRG_LEVEL … #define SGPIO_INT_TRG_EDGE … #define SGPIO_INT_TRG_EDGE_FALL … #define SGPIO_INT_TRG_EDGE_RISE … #define SGPIO_TRG_LEVEL_HIGH … #define SGPIO_TRG_LEVEL_LOW … static const struct sgpio_properties properties_luton = …; static const struct sgpio_properties properties_ocelot = …; static const struct sgpio_properties properties_sparx5 = …; static const char * const functions[] = …; struct sgpio_bank { … }; struct sgpio_priv { … }; struct sgpio_port_addr { … }; static inline void sgpio_pin_to_addr(struct sgpio_priv *priv, int pin, struct sgpio_port_addr *addr) { … } static inline int sgpio_addr_to_pin(struct sgpio_priv *priv, int port, int bit) { … } static inline u32 sgpio_get_addr(struct sgpio_priv *priv, u32 rno, u32 off) { … } static u32 sgpio_readl(struct sgpio_priv *priv, u32 rno, u32 off) { … } static void sgpio_writel(struct sgpio_priv *priv, u32 val, u32 rno, u32 off) { … } static inline void sgpio_clrsetbits(struct sgpio_priv *priv, u32 rno, u32 off, u32 clear, u32 set) { … } static inline void sgpio_configure_bitstream(struct sgpio_priv *priv) { … } static inline void sgpio_configure_clock(struct sgpio_priv *priv, u32 clkfrq) { … } static int sgpio_single_shot(struct sgpio_priv *priv) { … } static int sgpio_output_set(struct sgpio_priv *priv, struct sgpio_port_addr *addr, int value) { … } static int sgpio_output_get(struct sgpio_priv *priv, struct sgpio_port_addr *addr) { … } static int sgpio_input_get(struct sgpio_priv *priv, struct sgpio_port_addr *addr) { … } static int sgpio_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { … } static int sgpio_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) { … } static const struct pinconf_ops sgpio_confops = …; static int sgpio_get_functions_count(struct pinctrl_dev *pctldev) { … } static const char *sgpio_get_function_name(struct pinctrl_dev *pctldev, unsigned int function) { … } static int sgpio_get_function_groups(struct pinctrl_dev *pctldev, unsigned int function, const char *const **groups, unsigned *const num_groups) { … } static int sgpio_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, unsigned int group) { … } static int sgpio_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) { … } static int sgpio_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { … } static const struct pinmux_ops sgpio_pmx_ops = …; static int sgpio_pctl_get_groups_count(struct pinctrl_dev *pctldev) { … } static const char *sgpio_pctl_get_group_name(struct pinctrl_dev *pctldev, unsigned int group) { … } static int sgpio_pctl_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, const unsigned int **pins, unsigned int *num_pins) { … } static const struct pinctrl_ops sgpio_pctl_ops = …; static int microchip_sgpio_direction_input(struct gpio_chip *gc, unsigned int gpio) { … } static int microchip_sgpio_direction_output(struct gpio_chip *gc, unsigned int gpio, int value) { … } static int microchip_sgpio_get_direction(struct gpio_chip *gc, unsigned int gpio) { … } static void microchip_sgpio_set_value(struct gpio_chip *gc, unsigned int gpio, int value) { … } static int microchip_sgpio_get_value(struct gpio_chip *gc, unsigned int gpio) { … } static int microchip_sgpio_of_xlate(struct gpio_chip *gc, const struct of_phandle_args *gpiospec, u32 *flags) { … } static int microchip_sgpio_get_ports(struct sgpio_priv *priv) { … } static void microchip_sgpio_irq_settype(struct irq_data *data, int type, int polarity) { … } static void microchip_sgpio_irq_setreg(struct irq_data *data, int reg, bool clear) { … } static void microchip_sgpio_irq_mask(struct irq_data *data) { … } static void microchip_sgpio_irq_unmask(struct irq_data *data) { … } static void microchip_sgpio_irq_ack(struct irq_data *data) { … } static int microchip_sgpio_irq_set_type(struct irq_data *data, unsigned int type) { … } static const struct irq_chip microchip_sgpio_irqchip = …; static void sgpio_irq_handler(struct irq_desc *desc) { … } static int microchip_sgpio_register_bank(struct device *dev, struct sgpio_priv *priv, struct fwnode_handle *fwnode, int bankno) { … } static int microchip_sgpio_probe(struct platform_device *pdev) { … } static const struct of_device_id microchip_sgpio_gpio_of_match[] = …; MODULE_DEVICE_TABLE(of, microchip_sgpio_gpio_of_match); static struct platform_driver microchip_sgpio_pinctrl_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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