/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021 Rockchip Electronics Co. Ltd. * * Copyright (c) 2013 MundoReader S.L. * Author: Heiko Stuebner <[email protected]> * * With some ideas taken from pinctrl-samsung: * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * Copyright (c) 2012 Linaro Ltd * https://www.linaro.org * * and pinctrl-at91: * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> */ #ifndef _PINCTRL_ROCKCHIP_H #define _PINCTRL_ROCKCHIP_H #define RK_GPIO0_A0 … #define RK_GPIO0_A1 … #define RK_GPIO0_A2 … #define RK_GPIO0_A3 … #define RK_GPIO0_A4 … #define RK_GPIO0_A5 … #define RK_GPIO0_A6 … #define RK_GPIO0_A7 … #define RK_GPIO0_B0 … #define RK_GPIO0_B1 … #define RK_GPIO0_B2 … #define RK_GPIO0_B3 … #define RK_GPIO0_B4 … #define RK_GPIO0_B5 … #define RK_GPIO0_B6 … #define RK_GPIO0_B7 … #define RK_GPIO0_C0 … #define RK_GPIO0_C1 … #define RK_GPIO0_C2 … #define RK_GPIO0_C3 … #define RK_GPIO0_C4 … #define RK_GPIO0_C5 … #define RK_GPIO0_C6 … #define RK_GPIO0_C7 … #define RK_GPIO0_D0 … #define RK_GPIO0_D1 … #define RK_GPIO0_D2 … #define RK_GPIO0_D3 … #define RK_GPIO0_D4 … #define RK_GPIO0_D5 … #define RK_GPIO0_D6 … #define RK_GPIO0_D7 … #define RK_GPIO1_A0 … #define RK_GPIO1_A1 … #define RK_GPIO1_A2 … #define RK_GPIO1_A3 … #define RK_GPIO1_A4 … #define RK_GPIO1_A5 … #define RK_GPIO1_A6 … #define RK_GPIO1_A7 … #define RK_GPIO1_B0 … #define RK_GPIO1_B1 … #define RK_GPIO1_B2 … #define RK_GPIO1_B3 … #define RK_GPIO1_B4 … #define RK_GPIO1_B5 … #define RK_GPIO1_B6 … #define RK_GPIO1_B7 … #define RK_GPIO1_C0 … #define RK_GPIO1_C1 … #define RK_GPIO1_C2 … #define RK_GPIO1_C3 … #define RK_GPIO1_C4 … #define RK_GPIO1_C5 … #define RK_GPIO1_C6 … #define RK_GPIO1_C7 … #define RK_GPIO1_D0 … #define RK_GPIO1_D1 … #define RK_GPIO1_D2 … #define RK_GPIO1_D3 … #define RK_GPIO1_D4 … #define RK_GPIO1_D5 … #define RK_GPIO1_D6 … #define RK_GPIO1_D7 … #define RK_GPIO2_A0 … #define RK_GPIO2_A1 … #define RK_GPIO2_A2 … #define RK_GPIO2_A3 … #define RK_GPIO2_A4 … #define RK_GPIO2_A5 … #define RK_GPIO2_A6 … #define RK_GPIO2_A7 … #define RK_GPIO2_B0 … #define RK_GPIO2_B1 … #define RK_GPIO2_B2 … #define RK_GPIO2_B3 … #define RK_GPIO2_B4 … #define RK_GPIO2_B5 … #define RK_GPIO2_B6 … #define RK_GPIO2_B7 … #define RK_GPIO2_C0 … #define RK_GPIO2_C1 … #define RK_GPIO2_C2 … #define RK_GPIO2_C3 … #define RK_GPIO2_C4 … #define RK_GPIO2_C5 … #define RK_GPIO2_C6 … #define RK_GPIO2_C7 … #define RK_GPIO2_D0 … #define RK_GPIO2_D1 … #define RK_GPIO2_D2 … #define RK_GPIO2_D3 … #define RK_GPIO2_D4 … #define RK_GPIO2_D5 … #define RK_GPIO2_D6 … #define RK_GPIO2_D7 … #define RK_GPIO3_A0 … #define RK_GPIO3_A1 … #define RK_GPIO3_A2 … #define RK_GPIO3_A3 … #define RK_GPIO3_A4 … #define RK_GPIO3_A5 … #define RK_GPIO3_A6 … #define RK_GPIO3_A7 … #define RK_GPIO3_B0 … #define RK_GPIO3_B1 … #define RK_GPIO3_B2 … #define RK_GPIO3_B3 … #define RK_GPIO3_B4 … #define RK_GPIO3_B5 … #define RK_GPIO3_B6 … #define RK_GPIO3_B7 … #define RK_GPIO3_C0 … #define RK_GPIO3_C1 … #define RK_GPIO3_C2 … #define RK_GPIO3_C3 … #define RK_GPIO3_C4 … #define RK_GPIO3_C5 … #define RK_GPIO3_C6 … #define RK_GPIO3_C7 … #define RK_GPIO3_D0 … #define RK_GPIO3_D1 … #define RK_GPIO3_D2 … #define RK_GPIO3_D3 … #define RK_GPIO3_D4 … #define RK_GPIO3_D5 … #define RK_GPIO3_D6 … #define RK_GPIO3_D7 … #define RK_GPIO4_A0 … #define RK_GPIO4_A1 … #define RK_GPIO4_A2 … #define RK_GPIO4_A3 … #define RK_GPIO4_A4 … #define RK_GPIO4_A5 … #define RK_GPIO4_A6 … #define RK_GPIO4_A7 … #define RK_GPIO4_B0 … #define RK_GPIO4_B1 … #define RK_GPIO4_B2 … #define RK_GPIO4_B3 … #define RK_GPIO4_B4 … #define RK_GPIO4_B5 … #define RK_GPIO4_B6 … #define RK_GPIO4_B7 … #define RK_GPIO4_C0 … #define RK_GPIO4_C1 … #define RK_GPIO4_C2 … #define RK_GPIO4_C3 … #define RK_GPIO4_C4 … #define RK_GPIO4_C5 … #define RK_GPIO4_C6 … #define RK_GPIO4_C7 … #define RK_GPIO4_D0 … #define RK_GPIO4_D1 … #define RK_GPIO4_D2 … #define RK_GPIO4_D3 … #define RK_GPIO4_D4 … #define RK_GPIO4_D5 … #define RK_GPIO4_D6 … #define RK_GPIO4_D7 … enum rockchip_pinctrl_type { … }; /** * struct rockchip_gpio_regs * @port_dr: data register * @port_ddr: data direction register * @int_en: interrupt enable * @int_mask: interrupt mask * @int_type: interrupt trigger type, such as high, low, edge trriger type. * @int_polarity: interrupt polarity enable register * @int_bothedge: interrupt bothedge enable register * @int_status: interrupt status register * @int_rawstatus: int_status = int_rawstatus & int_mask * @debounce: enable debounce for interrupt signal * @dbclk_div_en: enable divider for debounce clock * @dbclk_div_con: setting for divider of debounce clock * @port_eoi: end of interrupt of the port * @ext_port: port data from external * @version_id: controller version register */ struct rockchip_gpio_regs { … }; /** * struct rockchip_iomux * @type: iomux variant using IOMUX_* constants * @offset: if initialized to -1 it will be autocalculated, by specifying * an initial offset value the relevant source offset can be reset * to a new value for autocalculating the following iomux registers. */ struct rockchip_iomux { … }; /* * enum type index corresponding to rockchip_perpin_drv_list arrays index. */ enum rockchip_pin_drv_type { … }; /* * enum type index corresponding to rockchip_pull_list arrays index. */ enum rockchip_pin_pull_type { … }; /** * struct rockchip_drv * @drv_type: drive strength variant using rockchip_perpin_drv_type * @offset: if initialized to -1 it will be autocalculated, by specifying * an initial offset value the relevant source offset can be reset * to a new value for autocalculating the following drive strength * registers. if used chips own cal_drv func instead to calculate * registers offset, the variant could be ignored. */ struct rockchip_drv { … }; /** * struct rockchip_pin_bank * @dev: the pinctrl device bind to the bank * @reg_base: register base of the gpio bank * @regmap_pull: optional separate register for additional pull settings * @clk: clock of the gpio bank * @db_clk: clock of the gpio debounce * @irq: interrupt of the gpio bank * @saved_masks: Saved content of GPIO_INTEN at suspend time. * @pin_base: first pin number * @nr_pins: number of pins in this bank * @name: name of the bank * @bank_num: number of the bank, to account for holes * @iomux: array describing the 4 iomux sources of the bank * @drv: array describing the 4 drive strength sources of the bank * @pull_type: array describing the 4 pull type sources of the bank * @valid: is all necessary information present * @of_node: dt node of this bank * @drvdata: common pinctrl basedata * @domain: irqdomain of the gpio bank * @gpio_chip: gpiolib chip * @grange: gpio range * @slock: spinlock for the gpio bank * @toggle_edge_mode: bit mask to toggle (falling/rising) edge mode * @recalced_mask: bit mask to indicate a need to recalulate the mask * @route_mask: bits describing the routing pins of per bank * @deferred_output: gpio output settings to be done after gpio bank probed * @deferred_lock: mutex for the deferred_output shared btw gpio and pinctrl */ struct rockchip_pin_bank { … }; /** * struct rockchip_mux_recalced_data: represent a pin iomux data. * @num: bank number. * @pin: pin number. * @bit: index at register. * @reg: register offset. * @mask: mask bit */ struct rockchip_mux_recalced_data { … }; enum rockchip_mux_route_location { … }; /** * struct rockchip_mux_recalced_data: represent a pin iomux data. * @bank_num: bank number. * @pin: index at register or used to calc index. * @func: the min pin. * @route_location: the mux route location (same, pmu, grf). * @route_offset: the max pin. * @route_val: the register offset. */ struct rockchip_mux_route_data { … }; struct rockchip_pin_ctrl { … }; struct rockchip_pin_config { … }; enum pin_config_param; struct rockchip_pin_deferred { … }; /** * struct rockchip_pin_group: represent group of pins of a pinmux function. * @name: name of the pin group, used to lookup the group. * @pins: the pins included in this group. * @npins: number of pins included in this group. * @data: local pin configuration */ struct rockchip_pin_group { … }; /** * struct rockchip_pmx_func: represent a pin function. * @name: name of the pin function, used to lookup the function. * @groups: one or more names of pin groups that provide this function. * @ngroups: number of groups included in @groups. */ struct rockchip_pmx_func { … }; struct rockchip_pinctrl { … }; #endif
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