linux/drivers/pinctrl/pinctrl-stmfx.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
 *
 * Copyright (C) 2019 STMicroelectronics
 * Author(s): Amelie Delaunay <[email protected]>.
 */
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/mfd/stmfx.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/string_choices.h>

#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinmux.h>

#include "core.h"
#include "pinctrl-utils.h"

/* GPIOs expander */
/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
#define STMFX_REG_GPIO_STATE
/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
#define STMFX_REG_GPIO_DIR
/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
#define STMFX_REG_GPIO_TYPE
/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
#define STMFX_REG_GPIO_PUPD
/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
#define STMFX_REG_GPO_SET
/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
#define STMFX_REG_GPO_CLR
/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
#define STMFX_REG_IRQ_GPI_SRC
/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
#define STMFX_REG_IRQ_GPI_EVT
/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
#define STMFX_REG_IRQ_GPI_TYPE
/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
#define STMFX_REG_IRQ_GPI_PENDING
/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
#define STMFX_REG_IRQ_GPI_ACK

#define NR_GPIO_REGS
#define NR_GPIOS_PER_REG
#define get_reg(offset)
#define get_shift(offset)
#define get_mask(offset)

/*
 * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
 * Pins availability is managed thanks to gpio-ranges property.
 */
static const struct pinctrl_pin_desc stmfx_pins[] =;

struct stmfx_pinctrl {};

static int stmfx_gpio_get(struct gpio_chip *gc, unsigned int offset)
{}

static void stmfx_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
{}

static int stmfx_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
{}

static int stmfx_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
{}

static int stmfx_gpio_direction_output(struct gpio_chip *gc,
				       unsigned int offset, int value)
{}

static int stmfx_pinconf_get_pupd(struct stmfx_pinctrl *pctl,
				  unsigned int offset)
{}

static int stmfx_pinconf_set_pupd(struct stmfx_pinctrl *pctl,
				  unsigned int offset, u32 pupd)
{}

static int stmfx_pinconf_get_type(struct stmfx_pinctrl *pctl,
				  unsigned int offset)
{}

static int stmfx_pinconf_set_type(struct stmfx_pinctrl *pctl,
				  unsigned int offset, u32 type)
{}

static int stmfx_pinconf_get(struct pinctrl_dev *pctldev,
			     unsigned int pin, unsigned long *config)
{}

static int stmfx_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
			     unsigned long *configs, unsigned int num_configs)
{}

static void stmfx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
				   struct seq_file *s, unsigned int offset)
{}

static const struct pinconf_ops stmfx_pinconf_ops =;

static int stmfx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
{}

static const char *stmfx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
						unsigned int selector)
{}

static int stmfx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
					unsigned int selector,
					const unsigned int **pins,
					unsigned int *num_pins)
{}

static const struct pinctrl_ops stmfx_pinctrl_ops =;

static void stmfx_pinctrl_irq_mask(struct irq_data *data)
{}

static void stmfx_pinctrl_irq_unmask(struct irq_data *data)
{}

static int stmfx_pinctrl_irq_set_type(struct irq_data *data, unsigned int type)
{}

static void stmfx_pinctrl_irq_bus_lock(struct irq_data *data)
{}

static void stmfx_pinctrl_irq_bus_sync_unlock(struct irq_data *data)
{}

static int stmfx_gpio_irq_request_resources(struct irq_data *data)
{}

static void stmfx_gpio_irq_release_resources(struct irq_data *data)
{}

static void stmfx_pinctrl_irq_toggle_trigger(struct stmfx_pinctrl *pctl,
					     unsigned int offset)
{}

static irqreturn_t stmfx_pinctrl_irq_thread_fn(int irq, void *dev_id)
{}

static void stmfx_pinctrl_irq_print_chip(struct irq_data *d, struct seq_file *p)
{}

static const struct irq_chip stmfx_pinctrl_irq_chip =;

static int stmfx_pinctrl_gpio_function_enable(struct stmfx_pinctrl *pctl)
{}

static int stmfx_pinctrl_probe(struct platform_device *pdev)
{}

static void stmfx_pinctrl_remove(struct platform_device *pdev)
{}

#ifdef CONFIG_PM_SLEEP
static int stmfx_pinctrl_backup_regs(struct stmfx_pinctrl *pctl)
{}

static int stmfx_pinctrl_restore_regs(struct stmfx_pinctrl *pctl)
{}

static int stmfx_pinctrl_suspend(struct device *dev)
{}

static int stmfx_pinctrl_resume(struct device *dev)
{}
#endif

static SIMPLE_DEV_PM_OPS(stmfx_pinctrl_dev_pm_ops,
			 stmfx_pinctrl_suspend, stmfx_pinctrl_resume);

static const struct of_device_id stmfx_pinctrl_of_match[] =;
MODULE_DEVICE_TABLE(of, stmfx_pinctrl_of_match);

static struct platform_driver stmfx_pinctrl_driver =;
module_platform_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();