linux/drivers/pinctrl/pinctrl-rockchip.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Pinctrl driver for Rockchip SoCs
 *
 * Copyright (c) 2013 MundoReader S.L.
 * Author: Heiko Stuebner <[email protected]>
 *
 * With some ideas taken from pinctrl-samsung:
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2012 Linaro Ltd
 *		https://www.linaro.org
 *
 * and pinctrl-at91:
 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/gpio/driver.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <linux/string_helpers.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include "core.h"
#include "pinconf.h"
#include "pinctrl-rockchip.h"

/*
 * Generate a bitmask for setting a value (v) with a write mask bit in hiword
 * register 31:16 area.
 */
#define WRITE_MASK_VAL(h, l, v)

/*
 * Encode variants of iomux registers into a type variable
 */
#define IOMUX_GPIO_ONLY
#define IOMUX_WIDTH_4BIT
#define IOMUX_SOURCE_PMU
#define IOMUX_UNROUTED
#define IOMUX_WIDTH_3BIT
#define IOMUX_WIDTH_2BIT
#define IOMUX_L_SOURCE_PMU

#define PIN_BANK(id, pins, label)

#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)

#define PIN_BANK_IOMUX_FLAGS_OFFSET_PULL_FLAGS(id, pins, label, iom0,	\
					       iom1, iom2, iom3,	\
					       offset0, offset1,	\
					       offset2, offset3, pull0,	\
					       pull1, pull2, pull3)

#define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3)

#define PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(id, pins, label, iom0, iom1,	\
					iom2, iom3, pull0, pull1,	\
					pull2, pull3)

#define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1,	\
				      drv2, drv3, pull0, pull1,		\
				      pull2, pull3)

#define PIN_BANK_IOMUX_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2,	\
				    iom3, offset0, offset1, offset2,	\
				    offset3)

#define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1,	\
					iom2, iom3, drv0, drv1, drv2,	\
					drv3, offset0, offset1,		\
					offset2, offset3)

#define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
					      label, iom0, iom1, iom2,  \
					      iom3, drv0, drv1, drv2,   \
					      drv3, offset0, offset1,   \
					      offset2, offset3, pull0,  \
					      pull1, pull2, pull3)

#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG)

#define RK_MUXROUTE_SAME(ID, PIN, FUNC, REG, VAL)

#define RK_MUXROUTE_GRF(ID, PIN, FUNC, REG, VAL)

#define RK_MUXROUTE_PMU(ID, PIN, FUNC, REG, VAL)

#define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P)

static struct regmap_config rockchip_regmap_config =;

static inline const struct rockchip_pin_group *pinctrl_name_to_group(
					const struct rockchip_pinctrl *info,
					const char *name)
{}

/*
 * given a pin number that is local to a pin controller, find out the pin bank
 * and the register base of the pin bank.
 */
static struct rockchip_pin_bank *pin_to_bank(struct rockchip_pinctrl *info,
								unsigned pin)
{}

static struct rockchip_pin_bank *bank_num_to_bank(
					struct rockchip_pinctrl *info,
					unsigned num)
{}

/*
 * Pinctrl_ops handling
 */

static int rockchip_get_groups_count(struct pinctrl_dev *pctldev)
{}

static const char *rockchip_get_group_name(struct pinctrl_dev *pctldev,
							unsigned selector)
{}

static int rockchip_get_group_pins(struct pinctrl_dev *pctldev,
				      unsigned selector, const unsigned **pins,
				      unsigned *npins)
{}

static int rockchip_dt_node_to_map(struct pinctrl_dev *pctldev,
				 struct device_node *np,
				 struct pinctrl_map **map, unsigned *num_maps)
{}

static void rockchip_dt_free_map(struct pinctrl_dev *pctldev,
				    struct pinctrl_map *map, unsigned num_maps)
{}

static const struct pinctrl_ops rockchip_pctrl_ops =;

/*
 * Hardware access
 */

static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] =;

static struct rockchip_mux_recalced_data rv1126_mux_recalced_data[] =;

static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] =;

static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] =;

static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] =;

static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
				      int *reg, u8 *bit, int *mask)
{}

static struct rockchip_mux_route_data px30_mux_route_data[] =;

static struct rockchip_mux_route_data rv1126_mux_route_data[] =;

static struct rockchip_mux_route_data rk3128_mux_route_data[] =;

static struct rockchip_mux_route_data rk3188_mux_route_data[] =;

static struct rockchip_mux_route_data rk3228_mux_route_data[] =;

static struct rockchip_mux_route_data rk3288_mux_route_data[] =;

static struct rockchip_mux_route_data rk3308_mux_route_data[] =;

static struct rockchip_mux_route_data rk3328_mux_route_data[] =;

static struct rockchip_mux_route_data rk3399_mux_route_data[] =;

static struct rockchip_mux_route_data rk3568_mux_route_data[] =;

static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
				   int mux, u32 *loc, u32 *reg, u32 *value)
{}

static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
{}

static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
			       int pin, int mux)
{}

/*
 * Set a new mux function for a pin.
 *
 * The register is divided into the upper and lower 16 bit. When changing
 * a value, the previous register value is not read and changed. Instead
 * it seems the changed bits are marked in the upper 16 bit, while the
 * changed value gets set in the same offset in the lower 16 bit.
 * All pin settings seem to be 2 bit wide in both the upper and lower
 * parts.
 * @bank: pin bank to change
 * @pin: pin to change
 * @mux: new mux function to set
 */
static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
{}

#define PX30_PULL_PMU_OFFSET
#define PX30_PULL_GRF_OFFSET
#define PX30_PULL_BITS_PER_PIN
#define PX30_PULL_PINS_PER_REG
#define PX30_PULL_BANK_STRIDE

static int px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
				      int pin_num, struct regmap **regmap,
				      int *reg, u8 *bit)
{}

#define PX30_DRV_PMU_OFFSET
#define PX30_DRV_GRF_OFFSET
#define PX30_DRV_BITS_PER_PIN
#define PX30_DRV_PINS_PER_REG
#define PX30_DRV_BANK_STRIDE

static int px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				     int pin_num, struct regmap **regmap,
				     int *reg, u8 *bit)
{}

#define PX30_SCHMITT_PMU_OFFSET
#define PX30_SCHMITT_GRF_OFFSET
#define PX30_SCHMITT_PINS_PER_PMU_REG
#define PX30_SCHMITT_BANK_STRIDE
#define PX30_SCHMITT_PINS_PER_GRF_REG

static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					 int pin_num,
					 struct regmap **regmap,
					 int *reg, u8 *bit)
{}

#define RV1108_PULL_PMU_OFFSET
#define RV1108_PULL_OFFSET
#define RV1108_PULL_PINS_PER_REG
#define RV1108_PULL_BITS_PER_PIN
#define RV1108_PULL_BANK_STRIDE

static int rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RV1108_DRV_PMU_OFFSET
#define RV1108_DRV_GRF_OFFSET
#define RV1108_DRV_BITS_PER_PIN
#define RV1108_DRV_PINS_PER_REG
#define RV1108_DRV_BANK_STRIDE

static int rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RV1108_SCHMITT_PMU_OFFSET
#define RV1108_SCHMITT_GRF_OFFSET
#define RV1108_SCHMITT_BANK_STRIDE
#define RV1108_SCHMITT_PINS_PER_GRF_REG
#define RV1108_SCHMITT_PINS_PER_PMU_REG

static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

#define RV1126_PULL_PMU_OFFSET
#define RV1126_PULL_GRF_GPIO1A0_OFFSET
#define RV1126_PULL_PINS_PER_REG
#define RV1126_PULL_BITS_PER_PIN
#define RV1126_PULL_BANK_STRIDE
#define RV1126_GPIO_C4_D7(p)

static int rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RV1126_DRV_PMU_OFFSET
#define RV1126_DRV_GRF_GPIO1A0_OFFSET
#define RV1126_DRV_BITS_PER_PIN
#define RV1126_DRV_PINS_PER_REG
#define RV1126_DRV_BANK_STRIDE

static int rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RV1126_SCHMITT_PMU_OFFSET
#define RV1126_SCHMITT_GRF_GPIO1A0_OFFSET
#define RV1126_SCHMITT_BANK_STRIDE
#define RV1126_SCHMITT_PINS_PER_GRF_REG
#define RV1126_SCHMITT_PINS_PER_PMU_REG

static int rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

#define RK3308_SCHMITT_PINS_PER_REG
#define RK3308_SCHMITT_BANK_STRIDE
#define RK3308_SCHMITT_GRF_OFFSET

static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
				    int pin_num, struct regmap **regmap,
				    int *reg, u8 *bit)
{}

#define RK2928_PULL_OFFSET
#define RK2928_PULL_PINS_PER_REG
#define RK2928_PULL_BANK_STRIDE

static int rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{
	struct rockchip_pinctrl *info = bank->drvdata;

	*regmap = info->regmap_base;
	*reg = RK2928_PULL_OFFSET;
	*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
	*reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4;

	*bit = pin_num % RK2928_PULL_PINS_PER_REG;

	return 0;
};

#define RK3128_PULL_OFFSET

static int rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3188_PULL_OFFSET
#define RK3188_PULL_BITS_PER_PIN
#define RK3188_PULL_PINS_PER_REG
#define RK3188_PULL_BANK_STRIDE
#define RK3188_PULL_PMU_OFFSET

static int rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3288_PULL_OFFSET
static int rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3288_DRV_PMU_OFFSET
#define RK3288_DRV_GRF_OFFSET
#define RK3288_DRV_BITS_PER_PIN
#define RK3288_DRV_PINS_PER_REG
#define RK3288_DRV_BANK_STRIDE

static int rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3228_PULL_OFFSET

static int rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3228_DRV_GRF_OFFSET

static int rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3308_PULL_OFFSET

static int rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3308_DRV_GRF_OFFSET

static int rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3368_PULL_GRF_OFFSET
#define RK3368_PULL_PMU_OFFSET

static int rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3368_DRV_PMU_OFFSET
#define RK3368_DRV_GRF_OFFSET

static int rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3399_PULL_GRF_OFFSET
#define RK3399_PULL_PMU_OFFSET
#define RK3399_DRV_3BITS_PER_PIN

static int rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

static int rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3568_PULL_PMU_OFFSET
#define RK3568_PULL_GRF_OFFSET
#define RK3568_PULL_BITS_PER_PIN
#define RK3568_PULL_PINS_PER_REG
#define RK3568_PULL_BANK_STRIDE

static int rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3568_DRV_PMU_OFFSET
#define RK3568_DRV_GRF_OFFSET
#define RK3568_DRV_BITS_PER_PIN
#define RK3568_DRV_PINS_PER_REG
#define RK3568_DRV_BANK_STRIDE

static int rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3576_DRV_BITS_PER_PIN
#define RK3576_DRV_PINS_PER_REG
#define RK3576_DRV_GPIO0_AL_OFFSET
#define RK3576_DRV_GPIO0_BH_OFFSET
#define RK3576_DRV_GPIO1_OFFSET
#define RK3576_DRV_GPIO2_OFFSET
#define RK3576_DRV_GPIO3_OFFSET
#define RK3576_DRV_GPIO4_AL_OFFSET
#define RK3576_DRV_GPIO4_CL_OFFSET
#define RK3576_DRV_GPIO4_DL_OFFSET

static int rk3576_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3576_PULL_BITS_PER_PIN
#define RK3576_PULL_PINS_PER_REG
#define RK3576_PULL_GPIO0_AL_OFFSET
#define RK3576_PULL_GPIO0_BH_OFFSET
#define RK3576_PULL_GPIO1_OFFSET
#define RK3576_PULL_GPIO2_OFFSET
#define RK3576_PULL_GPIO3_OFFSET
#define RK3576_PULL_GPIO4_AL_OFFSET
#define RK3576_PULL_GPIO4_CL_OFFSET
#define RK3576_PULL_GPIO4_DL_OFFSET

static int rk3576_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					 int pin_num, struct regmap **regmap,
					 int *reg, u8 *bit)
{}

#define RK3576_SMT_BITS_PER_PIN
#define RK3576_SMT_PINS_PER_REG
#define RK3576_SMT_GPIO0_AL_OFFSET
#define RK3576_SMT_GPIO0_BH_OFFSET
#define RK3576_SMT_GPIO1_OFFSET
#define RK3576_SMT_GPIO2_OFFSET
#define RK3576_SMT_GPIO3_OFFSET
#define RK3576_SMT_GPIO4_AL_OFFSET
#define RK3576_SMT_GPIO4_CL_OFFSET
#define RK3576_SMT_GPIO4_DL_OFFSET

static int rk3576_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

#define RK3588_PMU1_IOC_REG
#define RK3588_PMU2_IOC_REG
#define RK3588_BUS_IOC_REG
#define RK3588_VCCIO1_4_IOC_REG
#define RK3588_VCCIO3_5_IOC_REG
#define RK3588_VCCIO2_IOC_REG
#define RK3588_VCCIO6_IOC_REG
#define RK3588_EMMC_IOC_REG

static const u32 rk3588_ds_regs[][2] =;

static const u32 rk3588_p_regs[][2] =;

static const u32 rk3588_smt_regs[][2] =;

#define RK3588_PULL_BITS_PER_PIN
#define RK3588_PULL_PINS_PER_REG

static int rk3588_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
					int pin_num, struct regmap **regmap,
					int *reg, u8 *bit)
{}

#define RK3588_DRV_BITS_PER_PIN
#define RK3588_DRV_PINS_PER_REG

static int rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
				       int pin_num, struct regmap **regmap,
				       int *reg, u8 *bit)
{}

#define RK3588_SMT_BITS_PER_PIN
#define RK3588_SMT_PINS_PER_REG

static int rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] =;

static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank,
				     int pin_num)
{}

static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
				     int pin_num, int strength)
{}

static int rockchip_pull_list[PULL_TYPE_MAX][4] =;

static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
{}

static int rockchip_set_pull(struct rockchip_pin_bank *bank,
					int pin_num, int pull)
{}

#define RK3328_SCHMITT_BITS_PER_PIN
#define RK3328_SCHMITT_PINS_PER_REG
#define RK3328_SCHMITT_BANK_STRIDE
#define RK3328_SCHMITT_GRF_OFFSET

static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

#define RK3568_SCHMITT_BITS_PER_PIN
#define RK3568_SCHMITT_PINS_PER_REG
#define RK3568_SCHMITT_BANK_STRIDE
#define RK3568_SCHMITT_GRF_OFFSET
#define RK3568_SCHMITT_PMUGRF_OFFSET

static int rk3568_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
					   int pin_num,
					   struct regmap **regmap,
					   int *reg, u8 *bit)
{}

static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num)
{}

static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
				int pin_num, int enable)
{}

/*
 * Pinmux_ops handling
 */

static int rockchip_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
{}

static const char *rockchip_pmx_get_func_name(struct pinctrl_dev *pctldev,
					  unsigned selector)
{}

static int rockchip_pmx_get_groups(struct pinctrl_dev *pctldev,
				unsigned selector, const char * const **groups,
				unsigned * const num_groups)
{}

static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
			    unsigned group)
{}

static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
					   struct pinctrl_gpio_range *range,
					   unsigned offset,
					   bool input)
{}

static const struct pinmux_ops rockchip_pmx_ops =;

/*
 * Pinconf_ops handling
 */

static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
					enum pin_config_param pull)
{}

static int rockchip_pinconf_defer_pin(struct rockchip_pin_bank *bank,
					 unsigned int pin, u32 param, u32 arg)
{}

/* set the pin config settings for a specified pin */
static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
				unsigned long *configs, unsigned num_configs)
{}

/* get the pin config settings for a specified pin */
static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
							unsigned long *config)
{}

static const struct pinconf_ops rockchip_pinconf_ops =;

static const struct of_device_id rockchip_bank_match[] =;

static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info,
						struct device_node *np)
{}

static int rockchip_pinctrl_parse_groups(struct device_node *np,
					      struct rockchip_pin_group *grp,
					      struct rockchip_pinctrl *info,
					      u32 index)
{}

static int rockchip_pinctrl_parse_functions(struct device_node *np,
						struct rockchip_pinctrl *info,
						u32 index)
{}

static int rockchip_pinctrl_parse_dt(struct platform_device *pdev,
					      struct rockchip_pinctrl *info)
{}

static int rockchip_pinctrl_register(struct platform_device *pdev,
					struct rockchip_pinctrl *info)
{}

static const struct of_device_id rockchip_pinctrl_dt_match[];

/* retrieve the soc specific data */
static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
						struct rockchip_pinctrl *d,
						struct platform_device *pdev)
{}

#define RK3288_GRF_GPIO6C_IOMUX
#define GPIO6C6_SEL_WRITE_ENABLE

static u32 rk3288_grf_gpio6c_iomux;

static int __maybe_unused rockchip_pinctrl_suspend(struct device *dev)
{}

static int __maybe_unused rockchip_pinctrl_resume(struct device *dev)
{}

static SIMPLE_DEV_PM_OPS(rockchip_pinctrl_dev_pm_ops, rockchip_pinctrl_suspend,
			 rockchip_pinctrl_resume);

static int rockchip_pinctrl_probe(struct platform_device *pdev)
{}

static void rockchip_pinctrl_remove(struct platform_device *pdev)
{}

static struct rockchip_pin_bank px30_pin_banks[] =;

static struct rockchip_pin_ctrl px30_pin_ctrl =;

static struct rockchip_pin_bank rv1108_pin_banks[] =;

static struct rockchip_pin_ctrl rv1108_pin_ctrl =;

static struct rockchip_pin_bank rv1126_pin_banks[] =;

static struct rockchip_pin_ctrl rv1126_pin_ctrl =;

static struct rockchip_pin_bank rk2928_pin_banks[] =;

static struct rockchip_pin_ctrl rk2928_pin_ctrl =;

static struct rockchip_pin_bank rk3036_pin_banks[] =;

static struct rockchip_pin_ctrl rk3036_pin_ctrl =;

static struct rockchip_pin_bank rk3066a_pin_banks[] =;

static struct rockchip_pin_ctrl rk3066a_pin_ctrl =;

static struct rockchip_pin_bank rk3066b_pin_banks[] =;

static struct rockchip_pin_ctrl rk3066b_pin_ctrl =;

static struct rockchip_pin_bank rk3128_pin_banks[] =;

static struct rockchip_pin_ctrl rk3128_pin_ctrl =;

static struct rockchip_pin_bank rk3188_pin_banks[] =;

static struct rockchip_pin_ctrl rk3188_pin_ctrl =;

static struct rockchip_pin_bank rk3228_pin_banks[] =;

static struct rockchip_pin_ctrl rk3228_pin_ctrl =;

static struct rockchip_pin_bank rk3288_pin_banks[] =;

static struct rockchip_pin_ctrl rk3288_pin_ctrl =;

static struct rockchip_pin_bank rk3308_pin_banks[] =;

static struct rockchip_pin_ctrl rk3308_pin_ctrl =;

static struct rockchip_pin_bank rk3328_pin_banks[] =;

static struct rockchip_pin_ctrl rk3328_pin_ctrl =;

static struct rockchip_pin_bank rk3368_pin_banks[] =;

static struct rockchip_pin_ctrl rk3368_pin_ctrl =;

static struct rockchip_pin_bank rk3399_pin_banks[] =;

static struct rockchip_pin_ctrl rk3399_pin_ctrl =;

static struct rockchip_pin_bank rk3568_pin_banks[] =;

static struct rockchip_pin_ctrl rk3568_pin_ctrl =;

#define RK3576_PIN_BANK(ID, LABEL, OFFSET0, OFFSET1, OFFSET2, OFFSET3)

static struct rockchip_pin_bank rk3576_pin_banks[] =;

static struct rockchip_pin_ctrl rk3576_pin_ctrl __maybe_unused =;

static struct rockchip_pin_bank rk3588_pin_banks[] =;

static struct rockchip_pin_ctrl rk3588_pin_ctrl =;

static const struct of_device_id rockchip_pinctrl_dt_match[] =;

static struct platform_driver rockchip_pinctrl_driver =;

static int __init rockchip_pinctrl_drv_register(void)
{}
postcore_initcall(rockchip_pinctrl_drv_register);

static void __exit rockchip_pinctrl_drv_unregister(void)
{}
module_exit(rockchip_pinctrl_drv_unregister);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_ALIAS();
MODULE_DEVICE_TABLE(of, rockchip_pinctrl_dt_match);