linux/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h

#ifndef __src_common_sdk_nvidia_inc_ctrl_ctrl0073_ctrl0073dfp_h__
#define __src_common_sdk_nvidia_inc_ctrl_ctrl0073_ctrl0073dfp_h__

/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */

/*
 * SPDX-FileCopyrightText: Copyright (c) 2005-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#define NV0073_CTRL_CMD_DFP_GET_INFO

NV0073_CTRL_DFP_GET_INFO_PARAMS;

#define NV0073_CTRL_DFP_FLAGS_SIGNAL
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_TMDS
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_LVDS
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_SDI
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_DISPLAYPORT
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_DSI
#define NV0073_CTRL_DFP_FLAGS_SIGNAL_WRBK
#define NV0073_CTRL_DFP_FLAGS_LANE
#define NV0073_CTRL_DFP_FLAGS_LANE_NONE
#define NV0073_CTRL_DFP_FLAGS_LANE_SINGLE
#define NV0073_CTRL_DFP_FLAGS_LANE_DUAL
#define NV0073_CTRL_DFP_FLAGS_LANE_QUAD
#define NV0073_CTRL_DFP_FLAGS_LANE_OCT
#define NV0073_CTRL_DFP_FLAGS_LIMIT
#define NV0073_CTRL_DFP_FLAGS_LIMIT_DISABLE
#define NV0073_CTRL_DFP_FLAGS_LIMIT_60HZ_RR
#define NV0073_CTRL_DFP_FLAGS_SLI_SCALER
#define NV0073_CTRL_DFP_FLAGS_SLI_SCALER_NORMAL
#define NV0073_CTRL_DFP_FLAGS_SLI_SCALER_DISABLE
#define NV0073_CTRL_DFP_FLAGS_HDMI_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_HDMI_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_HDMI_CAPABLE_TRUE
#define NV0073_CTRL_DFP_FLAGS_RANGE_LIMITED_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_RANGE_LIMITED_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_RANGE_LIMITED_CAPABLE_TRUE
#define NV0073_CTRL_DFP_FLAGS_RANGE_AUTO_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_RANGE_AUTO_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_RANGE_AUTO_CAPABLE_TRUE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR422_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR422_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR422_CAPABLE_TRUE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR444_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR444_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_FORMAT_YCBCR444_CAPABLE_TRUE
#define NV0073_CTRL_DFP_FLAGS_HDMI_ALLOWED
#define NV0073_CTRL_DFP_FLAGS_HDMI_ALLOWED_FALSE
#define NV0073_CTRL_DFP_FLAGS_HDMI_ALLOWED_TRUE
#define NV0073_CTRL_DFP_FLAGS_EMBEDDED_DISPLAYPORT
#define NV0073_CTRL_DFP_FLAGS_EMBEDDED_DISPLAYPORT_FALSE
#define NV0073_CTRL_DFP_FLAGS_EMBEDDED_DISPLAYPORT_TRUE
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_CONSTRAINT
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_CONSTRAINT_NONE
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_CONSTRAINT_PREFER_RBR
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_BW
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_BW_1_62GBPS
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_BW_2_70GBPS
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_BW_5_40GBPS
#define NV0073_CTRL_DFP_FLAGS_DP_LINK_BW_8_10GBPS
#define NV0073_CTRL_DFP_FLAGS_LINK
#define NV0073_CTRL_DFP_FLAGS_LINK_NONE
#define NV0073_CTRL_DFP_FLAGS_LINK_SINGLE
#define NV0073_CTRL_DFP_FLAGS_LINK_DUAL
#define NV0073_CTRL_DFP_FLAGS_DP_FORCE_RM_EDID
#define NV0073_CTRL_DFP_FLAGS_DP_FORCE_RM_EDID_FALSE
#define NV0073_CTRL_DFP_FLAGS_DP_FORCE_RM_EDID_TRUE
#define NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID
#define NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID_DSI_NONE
#define NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID_DSI_A
#define NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID_DSI_B
#define NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID_DSI_GANGED
#define NV0073_CTRL_DFP_FLAGS_DP_POST_CURSOR2_DISABLED
#define NV0073_CTRL_DFP_FLAGS_DP_POST_CURSOR2_DISABLED_FALSE
#define NV0073_CTRL_DFP_FLAGS_DP_POST_CURSOR2_DISABLED_TRUE
#define NV0073_CTRL_DFP_FLAGS_DP_PHY_REPEATER_COUNT
#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE
#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_FALSE
#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_TRUE

#define NV0073_CTRL_CMD_DFP_SET_ELD_AUDIO_CAPS

#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_ELD_BUFFER

NV0073_CTRL_DFP_SET_ELD_AUDIO_CAP_PARAMS;

#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_PD
#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_PD_FALSE
#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_PD_TRUE
#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_ELDV
#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_ELDV_FALSE
#define NV0073_CTRL_DFP_ELD_AUDIO_CAPS_CTRL_ELDV_TRUE

#define NV0073_CTRL_CMD_DFP_SET_AUDIO_ENABLE

NV0073_CTRL_DFP_SET_AUDIO_ENABLE_PARAMS;

NV0073_CTRL_DFP_ASSIGN_SOR_LINKCONFIG;

NV0073_CTRL_DFP_ASSIGN_SOR_INFO;

#define NV0073_CTRL_CMD_DFP_ASSIGN_SOR

#define NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS

NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS;

#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_AUDIO
#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_AUDIO_OPTIMAL
#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_AUDIO_DEFAULT
#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_ACTIVE_SOR_NOT_AUDIO_CAPABLE
#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_ACTIVE_SOR_NOT_AUDIO_CAPABLE_NO
#define NV0073_CTRL_DFP_ASSIGN_SOR_FLAGS_ACTIVE_SOR_NOT_AUDIO_CAPABLE_YES

#endif