#ifndef __src_common_sdk_nvidia_inc_ctrl_ctrl0073_ctrl0073dp_h__ #define __src_common_sdk_nvidia_inc_ctrl_ctrl0073_ctrl0073dp_h__ #include <nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073common.h> /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */ /* * SPDX-FileCopyrightText: Copyright (c) 2005-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #define NV0073_CTRL_CMD_DP_AUXCH_CTRL … #define NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE … NV0073_CTRL_DP_AUXCH_CTRL_PARAMS; #define NV0073_CTRL_DP_AUXCH_CMD_TYPE … #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C … #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_AUX … #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT … #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_FALSE … #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_TRUE … #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE … #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE … #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_READ … #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE_STATUS … #define NV0073_CTRL_CMD_DP_CTRL … NV0073_CTRL_DP_CTRL_PARAMS; #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT … #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_FALSE … #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_TRUE … #define NV0073_CTRL_DP_CMD_SET_LINK_BW … #define NV0073_CTRL_DP_CMD_SET_LINK_BW_FALSE … #define NV0073_CTRL_DP_CMD_SET_LINK_BW_TRUE … #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD … #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_FALSE … #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_TRUE … #define NV0073_CTRL_DP_CMD_UNUSED … #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE … #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_SINGLE_STREAM … #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_MULTI_STREAM … #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING … #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_NO … #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_YES … #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING … #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_NO … #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_YES … #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING … #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_FALSE … #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_TRUE … #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING … #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_DEFAULT … #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_FORCE … #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING … #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_NO … #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_YES … #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED … #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_NO … #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_YES … #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING … #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_NO … #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION … #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON … #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER … #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_NO … #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_YES … #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG … #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_FALSE … #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_TRUE … #define NV0073_CTRL_DP_CMD_ENABLE_FEC … #define NV0073_CTRL_DP_CMD_ENABLE_FEC_FALSE … #define NV0073_CTRL_DP_CMD_ENABLE_FEC_TRUE … #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST … #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_NO … #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_YES … #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE … #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_FALSE … #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE … #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG … #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_FALSE … #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_TRUE … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_0 … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_1 … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_2 … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_4 … #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_8 … #define NV0073_CTRL_DP_DATA_SET_LINK_BW … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_1_62GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_16GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_43GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_70GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_3_24GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_4_32GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_5_40GBPS … #define NV0073_CTRL_DP_DATA_SET_LINK_BW_8_10GBPS … #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING … #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_NO … #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_YES … #define NV0073_CTRL_DP_DATA_TARGET … #define NV0073_CTRL_DP_DATA_TARGET_SINK … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_0 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_1 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_2 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_3 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_4 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_5 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_6 … #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_7 … #define NV0073_CTRL_MAX_LANES … NV0073_CTRL_DP_LANE_DATA_PARAMS; #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS … #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_NONE … #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL1 … #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL2 … #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL3 … #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT … #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL0 … #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL1 … #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL2 … #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL3 … #define NV0073_CTRL_CMD_DP_SET_LANE_DATA … #define NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM … NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS; #define NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID … NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS; #define NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID … NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS; #define NV0073_CTRL_CMD_DP_CONFIG_STREAM … NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS; #define NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT … NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS; #define NV0073_CTRL_CMD_DP_GET_CAPS … #define NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID … NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS; #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_NO … #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_YES … #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_NO … #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_YES … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_NONE … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_1_62 … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_2_70 … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_5_40 … #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_8_10 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_RGB … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_444 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_16 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_8 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_4 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_2 … #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1 … #define NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES … #define NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES … NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS; #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_BEGIN … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHALLENGE … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHECK … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_BEGIN … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHALLENGE … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHECK … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_RESET_MONITOR … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_INIT_PUBLIC_INFO … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_GET_PUBLIC_INFO … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_STATUS_CHECK … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_OK … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_PENDING … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_READ_ERROR … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_WRITE_ERROR … #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_DEVICE_ERROR … #endif
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