linux/drivers/gpu/drm/exynos/regs-mixer.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *
 *  Cloned from drivers/media/video/s5p-tv/regs-mixer.h
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 * http://www.samsung.com/
 *
 * Mixer register header file for Samsung Mixer driver
*/
#ifndef SAMSUNG_REGS_MIXER_H
#define SAMSUNG_REGS_MIXER_H

/*
 * Register part
 */
#define MXR_STATUS
#define MXR_CFG
#define MXR_INT_EN
#define MXR_INT_STATUS
#define MXR_LAYER_CFG
#define MXR_VIDEO_CFG
#define MXR_GRAPHIC0_CFG
#define MXR_GRAPHIC0_BASE
#define MXR_GRAPHIC0_SPAN
#define MXR_GRAPHIC0_SXY
#define MXR_GRAPHIC0_WH
#define MXR_GRAPHIC0_DXY
#define MXR_GRAPHIC0_BLANK
#define MXR_GRAPHIC1_CFG
#define MXR_GRAPHIC1_BASE
#define MXR_GRAPHIC1_SPAN
#define MXR_GRAPHIC1_SXY
#define MXR_GRAPHIC1_WH
#define MXR_GRAPHIC1_DXY
#define MXR_GRAPHIC1_BLANK
#define MXR_BG_CFG
#define MXR_BG_COLOR0
#define MXR_BG_COLOR1
#define MXR_BG_COLOR2
#define MXR_CM_COEFF_Y
#define MXR_CM_COEFF_CB
#define MXR_CM_COEFF_CR
#define MXR_MO
#define MXR_RESOLUTION

#define MXR_CFG_S
#define MXR_GRAPHIC0_BASE_S
#define MXR_GRAPHIC1_BASE_S

/* for parametrized access to layer registers */
#define MXR_GRAPHIC_CFG(i)
#define MXR_GRAPHIC_BASE(i)
#define MXR_GRAPHIC_SPAN(i)
#define MXR_GRAPHIC_SXY(i)
#define MXR_GRAPHIC_WH(i)
#define MXR_GRAPHIC_DXY(i)
#define MXR_GRAPHIC_BLANK(i)
#define MXR_GRAPHIC_BASE_S(i)

/*
 * Bit definition part
 */

/* generates mask for range of bits */
#define MXR_MASK(high_bit, low_bit)

#define MXR_MASK_VAL(val, high_bit, low_bit)

/* bits for MXR_STATUS */
#define MXR_STATUS_SOFT_RESET
#define MXR_STATUS_16_BURST
#define MXR_STATUS_BURST_MASK
#define MXR_STATUS_BIG_ENDIAN
#define MXR_STATUS_ENDIAN_MASK
#define MXR_STATUS_SYNC_ENABLE
#define MXR_STATUS_REG_IDLE
#define MXR_STATUS_REG_RUN

/* bits for MXR_CFG */
#define MXR_CFG_LAYER_UPDATE
#define MXR_CFG_LAYER_UPDATE_COUNT_MASK
#define MXR_CFG_QUANT_RANGE_FULL
#define MXR_CFG_QUANT_RANGE_LIMITED
#define MXR_CFG_RGB601
#define MXR_CFG_RGB709

#define MXR_CFG_RGB_FMT_MASK
#define MXR_CFG_OUT_YUV444
#define MXR_CFG_OUT_RGB888
#define MXR_CFG_OUT_MASK
#define MXR_CFG_DST_SDO
#define MXR_CFG_DST_HDMI
#define MXR_CFG_DST_MASK
#define MXR_CFG_SCAN_HD_720
#define MXR_CFG_SCAN_HD_1080
#define MXR_CFG_GRP1_ENABLE
#define MXR_CFG_GRP0_ENABLE
#define MXR_CFG_VP_ENABLE
#define MXR_CFG_SCAN_INTERLACE
#define MXR_CFG_SCAN_PROGRESSIVE
#define MXR_CFG_SCAN_NTSC
#define MXR_CFG_SCAN_PAL
#define MXR_CFG_SCAN_SD
#define MXR_CFG_SCAN_HD
#define MXR_CFG_SCAN_MASK

/* bits for MXR_VIDEO_CFG */
#define MXR_VID_CFG_BLEND_EN

/* bits for MXR_GRAPHICn_CFG */
#define MXR_GRP_CFG_COLOR_KEY_DISABLE
#define MXR_GRP_CFG_BLEND_PRE_MUL
#define MXR_GRP_CFG_WIN_BLEND_EN
#define MXR_GRP_CFG_PIXEL_BLEND_EN
#define MXR_GRP_CFG_MISC_MASK
#define MXR_GRP_CFG_FORMAT_VAL(x)
#define MXR_GRP_CFG_FORMAT_MASK
#define MXR_GRP_CFG_ALPHA_VAL(x)

/* bits for MXR_GRAPHICn_WH */
#define MXR_GRP_WH_H_SCALE(x)
#define MXR_GRP_WH_V_SCALE(x)
#define MXR_GRP_WH_WIDTH(x)
#define MXR_GRP_WH_HEIGHT(x)

/* bits for MXR_RESOLUTION */
#define MXR_MXR_RES_HEIGHT(x)
#define MXR_MXR_RES_WIDTH(x)

/* bits for MXR_GRAPHICn_SXY */
#define MXR_GRP_SXY_SX(x)
#define MXR_GRP_SXY_SY(x)

/* bits for MXR_GRAPHICn_DXY */
#define MXR_GRP_DXY_DX(x)
#define MXR_GRP_DXY_DY(x)

/* bits for MXR_INT_EN */
#define MXR_INT_EN_VSYNC
#define MXR_INT_EN_ALL

/* bits for MXR_INT_STATUS */
#define MXR_INT_CLEAR_VSYNC
#define MXR_INT_STATUS_VSYNC

/* bits for MXR_LAYER_CFG */
#define MXR_LAYER_CFG_GRP1_VAL(x)
#define MXR_LAYER_CFG_GRP1_MASK
#define MXR_LAYER_CFG_GRP0_VAL(x)
#define MXR_LAYER_CFG_GRP0_MASK
#define MXR_LAYER_CFG_VP_VAL(x)
#define MXR_LAYER_CFG_VP_MASK

/* bits for MXR_CM_COEFF_Y */
#define MXR_CM_COEFF_RGB_FULL

#endif /* SAMSUNG_REGS_MIXER_H */