// SPDX-License-Identifier: GPL-2.0-only /************************************************************************** * Copyright (c) 2011, Intel Corporation. * All Rights Reserved. * **************************************************************************/ #include <linux/delay.h> #include <drm/drm.h> #include <drm/drm_crtc_helper.h> #include "cdv_device.h" #include "gma_device.h" #include "intel_bios.h" #include "psb_drv.h" #include "psb_intel_reg.h" #include "psb_reg.h" #define VGA_SR_INDEX … #define VGA_SR_DATA … static void cdv_disable_vga(struct drm_device *dev) { … } static int cdv_output_init(struct drm_device *dev) { … } /* * Cedartrail Backlght Interfaces */ static int cdv_backlight_combination_mode(struct drm_device *dev) { … } static u32 cdv_get_max_backlight(struct drm_device *dev) { … } static int cdv_get_brightness(struct drm_device *dev) { … } static void cdv_set_brightness(struct drm_device *dev, int level) { … } static int cdv_backlight_init(struct drm_device *dev) { … } /* * Provide the Cedarview specific chip logic and low level methods * for power management * * FIXME: we need to implement the apm/ospm base management bits * for this and the MID devices. */ static inline u32 CDV_MSG_READ32(int domain, uint port, uint offset) { … } static inline void CDV_MSG_WRITE32(int domain, uint port, uint offset, u32 value) { … } #define PSB_PM_SSC … #define PSB_PM_SSS … #define PSB_PWRGT_GFX_ON … #define PSB_PWRGT_GFX_OFF … #define PSB_PWRGT_GFX_D0 … #define PSB_PWRGT_GFX_D3 … static void cdv_init_pm(struct drm_device *dev) { … } static void cdv_errata(struct drm_device *dev) { … } /** * cdv_save_display_registers - save registers lost on suspend * @dev: our DRM device * * Save the state we need in order to be able to restore the interface * upon resume from suspend */ static int cdv_save_display_registers(struct drm_device *dev) { … } /** * cdv_restore_display_registers - restore lost register state * @dev: our DRM device * * Restore register state that was lost during suspend and resume. * * FIXME: review */ static int cdv_restore_display_registers(struct drm_device *dev) { … } static int cdv_power_down(struct drm_device *dev) { … } static int cdv_power_up(struct drm_device *dev) { … } static void cdv_hotplug_work_func(struct work_struct *work) { … } /* The core driver has received a hotplug IRQ. We are in IRQ context so extract the needed information and kick off queued processing */ static int cdv_hotplug_event(struct drm_device *dev) { … } static void cdv_hotplug_enable(struct drm_device *dev, bool on) { … } static const char *force_audio_names[] = …; void cdv_intel_attach_force_audio_property(struct drm_connector *connector) { … } static const char *broadcast_rgb_names[] = …; void cdv_intel_attach_broadcast_rgb_property(struct drm_connector *connector) { … } /* Cedarview */ static const struct psb_offset cdv_regmap[2] = …; static int cdv_chip_setup(struct drm_device *dev) { … } /* CDV is much like Poulsbo but has MID like SGX offsets and PM */ const struct psb_ops cdv_chip_ops = …;
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