/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2015 Free Electrons * Copyright (C) 2015 NextThing Co * * Boris Brezillon <[email protected]> * Maxime Ripard <[email protected]> */ #ifndef __SUN4I_TCON_H__ #define __SUN4I_TCON_H__ #include <drm/drm_crtc.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/mod_devicetable.h> #include <linux/reset.h> #define SUN4I_TCON_GCTL_REG … #define SUN4I_TCON_GCTL_TCON_ENABLE … #define SUN4I_TCON_GCTL_IOMAP_MASK … #define SUN4I_TCON_GCTL_IOMAP_TCON1 … #define SUN4I_TCON_GCTL_IOMAP_TCON0 … #define SUN4I_TCON_GINT0_REG … #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) … #define SUN4I_TCON_GINT0_TCON0_TRI_FINISH_ENABLE … #define SUN4I_TCON_GINT0_TCON0_TRI_COUNTER_ENABLE … #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) … #define SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT … #define SUN4I_TCON_GINT0_TCON0_TRI_COUNTER_INT … #define SUN4I_TCON_GINT1_REG … #define SUN4I_TCON_FRM_CTL_REG … #define SUN4I_TCON0_FRM_CTL_EN … #define SUN4I_TCON0_FRM_CTL_MODE_R … #define SUN4I_TCON0_FRM_CTL_MODE_G … #define SUN4I_TCON0_FRM_CTL_MODE_B … #define SUN4I_TCON0_FRM_SEED_PR_REG … #define SUN4I_TCON0_FRM_SEED_PG_REG … #define SUN4I_TCON0_FRM_SEED_PB_REG … #define SUN4I_TCON0_FRM_SEED_LR_REG … #define SUN4I_TCON0_FRM_SEED_LG_REG … #define SUN4I_TCON0_FRM_SEED_LB_REG … #define SUN4I_TCON0_FRM_TBL0_REG … #define SUN4I_TCON0_FRM_TBL1_REG … #define SUN4I_TCON0_FRM_TBL2_REG … #define SUN4I_TCON0_FRM_TBL3_REG … #define SUN4I_TCON0_CTL_REG … #define SUN4I_TCON0_CTL_TCON_ENABLE … #define SUN4I_TCON0_CTL_IF_MASK … #define SUN4I_TCON0_CTL_IF_8080 … #define SUN4I_TCON0_CTL_CLK_DELAY_MASK … #define SUN4I_TCON0_CTL_CLK_DELAY(delay) … #define SUN4I_TCON0_CTL_SRC_SEL_MASK … #define SUN4I_TCON0_DCLK_REG … #define SUN4I_TCON0_DCLK_GATE_BIT … #define SUN4I_TCON0_DCLK_DIV_SHIFT … #define SUN4I_TCON0_DCLK_DIV_WIDTH … #define SUN4I_TCON0_BASIC0_REG … #define SUN4I_TCON0_BASIC0_X(width) … #define SUN4I_TCON0_BASIC0_Y(height) … #define SUN4I_TCON0_BASIC1_REG … #define SUN4I_TCON0_BASIC1_H_TOTAL(total) … #define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) … #define SUN4I_TCON0_BASIC2_REG … #define SUN4I_TCON0_BASIC2_V_TOTAL(total) … #define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) … #define SUN4I_TCON0_BASIC3_REG … #define SUN4I_TCON0_BASIC3_H_SYNC(width) … #define SUN4I_TCON0_BASIC3_V_SYNC(height) … #define SUN4I_TCON0_HV_IF_REG … #define SUN4I_TCON0_CPU_IF_REG … #define SUN4I_TCON0_CPU_IF_MODE_MASK … #define SUN4I_TCON0_CPU_IF_MODE_DSI … #define SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH … #define SUN4I_TCON0_CPU_IF_TRI_FIFO_EN … #define SUN4I_TCON0_CPU_IF_TRI_EN … #define SUN4I_TCON0_CPU_WR_REG … #define SUN4I_TCON0_CPU_RD0_REG … #define SUN4I_TCON0_CPU_RDA_REG … #define SUN4I_TCON0_TTL0_REG … #define SUN4I_TCON0_TTL1_REG … #define SUN4I_TCON0_TTL2_REG … #define SUN4I_TCON0_TTL3_REG … #define SUN4I_TCON0_TTL4_REG … #define SUN4I_TCON0_LVDS_IF_REG … #define SUN4I_TCON0_LVDS_IF_EN … #define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK … #define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS … #define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS … #define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK … #define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 … #define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK … #define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL … #define SUN4I_TCON0_LVDS_IF_CLK_POL_INV … #define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK … #define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL … #define SUN4I_TCON0_LVDS_IF_DATA_POL_INV … #define SUN4I_TCON0_IO_POL_REG … #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) … #define SUN4I_TCON0_IO_POL_DE_NEGATIVE … #define SUN4I_TCON0_IO_POL_DCLK_DRIVE_NEGEDGE … #define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE … #define SUN4I_TCON0_IO_POL_VSYNC_POSITIVE … #define SUN4I_TCON0_IO_TRI_REG … #define SUN4I_TCON0_IO_TRI_HSYNC_DISABLE … #define SUN4I_TCON0_IO_TRI_VSYNC_DISABLE … #define SUN4I_TCON0_IO_TRI_DATA_PINS_DISABLE(pins) … #define SUN4I_TCON1_CTL_REG … #define SUN4I_TCON1_CTL_TCON_ENABLE … #define SUN4I_TCON1_CTL_INTERLACE_ENABLE … #define SUN4I_TCON1_CTL_CLK_DELAY_MASK … #define SUN4I_TCON1_CTL_CLK_DELAY(delay) … #define SUN4I_TCON1_CTL_SRC_SEL_MASK … #define SUN4I_TCON1_BASIC0_REG … #define SUN4I_TCON1_BASIC0_X(width) … #define SUN4I_TCON1_BASIC0_Y(height) … #define SUN4I_TCON1_BASIC1_REG … #define SUN4I_TCON1_BASIC1_X(width) … #define SUN4I_TCON1_BASIC1_Y(height) … #define SUN4I_TCON1_BASIC2_REG … #define SUN4I_TCON1_BASIC2_X(width) … #define SUN4I_TCON1_BASIC2_Y(height) … #define SUN4I_TCON1_BASIC3_REG … #define SUN4I_TCON1_BASIC3_H_TOTAL(total) … #define SUN4I_TCON1_BASIC3_H_BACKPORCH(bp) … #define SUN4I_TCON1_BASIC4_REG … #define SUN4I_TCON1_BASIC4_V_TOTAL(total) … #define SUN4I_TCON1_BASIC4_V_BACKPORCH(bp) … #define SUN4I_TCON1_BASIC5_REG … #define SUN4I_TCON1_BASIC5_H_SYNC(width) … #define SUN4I_TCON1_BASIC5_V_SYNC(height) … #define SUN4I_TCON1_IO_POL_REG … /* there is no documentation about this bit */ #define SUN4I_TCON1_IO_POL_UNKNOWN … #define SUN4I_TCON1_IO_POL_HSYNC_POSITIVE … #define SUN4I_TCON1_IO_POL_VSYNC_POSITIVE … #define SUN4I_TCON1_IO_TRI_REG … #define SUN4I_TCON_ECC_FIFO_REG … #define SUN4I_TCON_ECC_FIFO_EN … #define SUN4I_TCON_CEU_CTL_REG … #define SUN4I_TCON_CEU_MUL_RR_REG … #define SUN4I_TCON_CEU_MUL_RG_REG … #define SUN4I_TCON_CEU_MUL_RB_REG … #define SUN4I_TCON_CEU_ADD_RC_REG … #define SUN4I_TCON_CEU_MUL_GR_REG … #define SUN4I_TCON_CEU_MUL_GG_REG … #define SUN4I_TCON_CEU_MUL_GB_REG … #define SUN4I_TCON_CEU_ADD_GC_REG … #define SUN4I_TCON_CEU_MUL_BR_REG … #define SUN4I_TCON_CEU_MUL_BG_REG … #define SUN4I_TCON_CEU_MUL_BB_REG … #define SUN4I_TCON_CEU_ADD_BC_REG … #define SUN4I_TCON_CEU_RANGE_R_REG … #define SUN4I_TCON_CEU_RANGE_G_REG … #define SUN4I_TCON_CEU_RANGE_B_REG … #define SUN4I_TCON0_CPU_TRI0_REG … #define SUN4I_TCON0_CPU_TRI0_BLOCK_SPACE(space) … #define SUN4I_TCON0_CPU_TRI0_BLOCK_SIZE(size) … #define SUN4I_TCON0_CPU_TRI1_REG … #define SUN4I_TCON0_CPU_TRI1_BLOCK_NUM(num) … #define SUN4I_TCON0_CPU_TRI2_REG … #define SUN4I_TCON0_CPU_TRI2_START_DELAY(delay) … #define SUN4I_TCON0_CPU_TRI2_TRANS_START_SET(set) … #define SUN4I_TCON_SAFE_PERIOD_REG … #define SUN4I_TCON_SAFE_PERIOD_NUM(num) … #define SUN4I_TCON_SAFE_PERIOD_MODE(mode) … #define SUN4I_TCON_MUX_CTRL_REG … #define SUN4I_TCON0_LVDS_ANA0_REG … #define SUN4I_TCON0_LVDS_ANA0_DCHS … #define SUN4I_TCON0_LVDS_ANA0_PD … #define SUN4I_TCON0_LVDS_ANA0_EN_MB … #define SUN4I_TCON0_LVDS_ANA0_REG_C … #define SUN4I_TCON0_LVDS_ANA0_REG_V … #define SUN4I_TCON0_LVDS_ANA0_CK_EN … #define SUN6I_TCON0_LVDS_ANA0_EN_MB … #define SUN6I_TCON0_LVDS_ANA0_EN_LDO … #define SUN6I_TCON0_LVDS_ANA0_EN_DRVC … #define SUN6I_TCON0_LVDS_ANA0_EN_DRVD(x) … #define SUN6I_TCON0_LVDS_ANA0_C(x) … #define SUN6I_TCON0_LVDS_ANA0_V(x) … #define SUN6I_TCON0_LVDS_ANA0_PD(x) … #define SUN4I_TCON0_LVDS_ANA1_REG … #define SUN4I_TCON0_LVDS_ANA1_INIT … #define SUN4I_TCON0_LVDS_ANA1_UPDATE … #define SUN4I_TCON1_FILL_CTL_REG … #define SUN4I_TCON1_FILL_BEG0_REG … #define SUN4I_TCON1_FILL_END0_REG … #define SUN4I_TCON1_FILL_DATA0_REG … #define SUN4I_TCON1_FILL_BEG1_REG … #define SUN4I_TCON1_FILL_END1_REG … #define SUN4I_TCON1_FILL_DATA1_REG … #define SUN4I_TCON1_FILL_BEG2_REG … #define SUN4I_TCON1_FILL_END2_REG … #define SUN4I_TCON1_FILL_DATA2_REG … #define SUN4I_TCON1_GAMMA_TABLE_REG … #define SUN4I_TCON_MAX_CHANNELS … struct sun4i_tcon; struct sun4i_tcon_quirks { … }; struct sun4i_tcon { … }; struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node); struct drm_panel *sun4i_tcon_find_panel(struct device_node *node); void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable); void sun4i_tcon_mode_set(struct sun4i_tcon *tcon, const struct drm_encoder *encoder, const struct drm_display_mode *mode); void sun4i_tcon_set_status(struct sun4i_tcon *crtc, const struct drm_encoder *encoder, bool enable); extern const struct of_device_id sun4i_tcon_of_table[]; #endif /* __SUN4I_TCON_H__ */
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