/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2017 Icenowy Zheng <[email protected]> */ #ifndef _SUN8I_MIXER_H_ #define _SUN8I_MIXER_H_ #include <linux/clk.h> #include <linux/regmap.h> #include <linux/reset.h> #include <drm/drm_plane.h> #include "sunxi_engine.h" #define SUN8I_MIXER_SIZE(w, h) … #define SUN8I_MIXER_COORD(x, y) … #define SUN8I_MIXER_GLOBAL_CTL … #define SUN8I_MIXER_GLOBAL_STATUS … #define SUN8I_MIXER_GLOBAL_DBUFF … #define SUN8I_MIXER_GLOBAL_SIZE … #define SUN8I_MIXER_GLOBAL_CTL_RT_EN … #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE … #define DE2_MIXER_UNIT_SIZE … #define DE3_MIXER_UNIT_SIZE … #define DE2_BLD_BASE … #define DE2_CH_BASE … #define DE2_CH_SIZE … #define DE3_BLD_BASE … #define DE3_CH_BASE … #define DE3_CH_SIZE … #define SUN8I_MIXER_BLEND_PIPE_CTL(base) … #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x) … #define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x) … #define SUN8I_MIXER_BLEND_ATTR_COORD(base, x) … #define SUN8I_MIXER_BLEND_ROUTE(base) … #define SUN8I_MIXER_BLEND_PREMULTIPLY(base) … #define SUN8I_MIXER_BLEND_BKCOLOR(base) … #define SUN8I_MIXER_BLEND_OUTSIZE(base) … #define SUN8I_MIXER_BLEND_MODE(base, x) … #define SUN8I_MIXER_BLEND_CK_CTL(base) … #define SUN8I_MIXER_BLEND_CK_CFG(base) … #define SUN8I_MIXER_BLEND_CK_MAX(base, x) … #define SUN8I_MIXER_BLEND_CK_MIN(base, x) … #define SUN8I_MIXER_BLEND_OUTCTL(base) … #define SUN50I_MIXER_BLEND_CSC_CTL(base) … #define SUN50I_MIXER_BLEND_CSC_COEFF(base, layer, x) … #define SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK … #define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe) … #define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe) … /* colors are always in AARRGGBB format */ #define SUN8I_MIXER_BLEND_COLOR_BLACK … /* The following numbers are some still unknown magic numbers */ #define SUN8I_MIXER_BLEND_MODE_DEF … #define SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(n) … #define SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(n) … #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED … #define SUN50I_MIXER_BLEND_CSC_CTL_EN(ch) … #define SUN50I_MIXER_BLEND_CSC_CONST_VAL(d, c) … #define SUN8I_MIXER_FBFMT_ARGB8888 … #define SUN8I_MIXER_FBFMT_ABGR8888 … #define SUN8I_MIXER_FBFMT_RGBA8888 … #define SUN8I_MIXER_FBFMT_BGRA8888 … #define SUN8I_MIXER_FBFMT_XRGB8888 … #define SUN8I_MIXER_FBFMT_XBGR8888 … #define SUN8I_MIXER_FBFMT_RGBX8888 … #define SUN8I_MIXER_FBFMT_BGRX8888 … #define SUN8I_MIXER_FBFMT_RGB888 … #define SUN8I_MIXER_FBFMT_BGR888 … #define SUN8I_MIXER_FBFMT_RGB565 … #define SUN8I_MIXER_FBFMT_BGR565 … #define SUN8I_MIXER_FBFMT_ARGB4444 … #define SUN8I_MIXER_FBFMT_ABGR4444 … #define SUN8I_MIXER_FBFMT_RGBA4444 … #define SUN8I_MIXER_FBFMT_BGRA4444 … #define SUN8I_MIXER_FBFMT_ARGB1555 … #define SUN8I_MIXER_FBFMT_ABGR1555 … #define SUN8I_MIXER_FBFMT_RGBA5551 … #define SUN8I_MIXER_FBFMT_BGRA5551 … #define SUN8I_MIXER_FBFMT_ARGB2101010 … #define SUN8I_MIXER_FBFMT_ABGR2101010 … #define SUN8I_MIXER_FBFMT_RGBA1010102 … #define SUN8I_MIXER_FBFMT_BGRA1010102 … #define SUN8I_MIXER_FBFMT_YUYV … #define SUN8I_MIXER_FBFMT_UYVY … #define SUN8I_MIXER_FBFMT_YVYU … #define SUN8I_MIXER_FBFMT_VYUY … #define SUN8I_MIXER_FBFMT_NV16 … #define SUN8I_MIXER_FBFMT_NV61 … #define SUN8I_MIXER_FBFMT_YUV422 … /* format 7 doesn't exist */ #define SUN8I_MIXER_FBFMT_NV12 … #define SUN8I_MIXER_FBFMT_NV21 … #define SUN8I_MIXER_FBFMT_YUV420 … /* format 11 doesn't exist */ /* format 12 is semi-planar YUV411 UVUV */ /* format 13 is semi-planar YUV411 VUVU */ #define SUN8I_MIXER_FBFMT_YUV411 … /* format 15 doesn't exist */ #define SUN8I_MIXER_FBFMT_P010_YUV … /* format 17 is P010 YVU */ #define SUN8I_MIXER_FBFMT_P210_YUV … /* format 19 is P210 YVU */ /* format 20 is packed YVU444 10-bit */ /* format 21 is packed YUV444 10-bit */ /* * Sub-engines listed bellow are unused for now. The EN registers are here only * to be used to disable these sub-engines. */ #define SUN8I_MIXER_FCE_EN … #define SUN8I_MIXER_BWS_EN … #define SUN8I_MIXER_LTI_EN … #define SUN8I_MIXER_PEAK_EN … #define SUN8I_MIXER_ASE_EN … #define SUN8I_MIXER_FCC_EN … #define SUN8I_MIXER_DCSC_EN … #define SUN50I_MIXER_FCE_EN … #define SUN50I_MIXER_PEAK_EN … #define SUN50I_MIXER_LCTI_EN … #define SUN50I_MIXER_BLS_EN … #define SUN50I_MIXER_FCC_EN … #define SUN50I_MIXER_DNS_EN … #define SUN50I_MIXER_DRC_EN … #define SUN50I_MIXER_FMT_EN … #define SUN50I_MIXER_CDC0_EN … #define SUN50I_MIXER_CDC1_EN … enum { … }; /** * struct sun8i_mixer_cfg - mixer HW configuration * @vi_num: number of VI channels * @ui_num: number of UI channels * @scaler_mask: bitmask which tells which channel supports scaling * First, scaler supports for VI channels is defined and after that, scaler * support for UI channels. For example, if mixer has 2 VI channels without * scaler and 2 UI channels with scaler, bitmask would be 0xC. * @ccsc: select set of CCSC base addresses from the enumeration above. * @mod_rate: module clock rate that needs to be set in order to have * a functional block. * @is_de3: true, if this is next gen display engine 3.0, false otherwise. * @scaline_yuv: size of a scanline for VI scaler for YUV formats. */ struct sun8i_mixer_cfg { … }; struct sun8i_mixer { … }; enum { … }; struct sun8i_layer { … }; static inline struct sun8i_layer * plane_to_sun8i_layer(struct drm_plane *plane) { … } static inline struct sun8i_mixer * engine_to_sun8i_mixer(struct sunxi_engine *engine) { … } static inline u32 sun8i_blender_base(struct sun8i_mixer *mixer) { … } static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { … } int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format); #endif /* _SUN8I_MIXER_H_ */
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