#ifndef COMMON_XML #define COMMON_XML /* Autogenerated file, DO NOT EDIT manually! This file was generated by the rules-ng-ng headergen tool in this git repository: http://0x04.net/cgit/index.cgi/rules-ng-ng git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: - texdesc_3d.xml ( 3183 bytes, from 2022-11-18 09:38:25) - copyright.xml ( 1597 bytes, from 2016-11-10 13:58:32) - common.xml ( 35664 bytes, from 2023-12-06 10:55:32) - common_3d.xml ( 15069 bytes, from 2023-11-22 10:05:24) Copyright (C) 2012-2023 by the following authors: - Wladimir J. van der Laan <[email protected]> - Christian Gmeiner <[email protected]> - Lucas Stach <[email protected]> - Russell King <[email protected]> Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #define PIPE_ID_PIPE_3D … #define PIPE_ID_PIPE_2D … #define SYNC_RECIPIENT_FE … #define SYNC_RECIPIENT_RA … #define SYNC_RECIPIENT_PE … #define SYNC_RECIPIENT_DE … #define SYNC_RECIPIENT_BLT … #define ENDIAN_MODE_NO_SWAP … #define ENDIAN_MODE_SWAP_16 … #define ENDIAN_MODE_SWAP_32 … #define chipModel_GC200 … #define chipModel_GC300 … #define chipModel_GC320 … #define chipModel_GC328 … #define chipModel_GC350 … #define chipModel_GC355 … #define chipModel_GC400 … #define chipModel_GC410 … #define chipModel_GC420 … #define chipModel_GC428 … #define chipModel_GC450 … #define chipModel_GC500 … #define chipModel_GC520 … #define chipModel_GC530 … #define chipModel_GC600 … #define chipModel_GC620 … #define chipModel_GC700 … #define chipModel_GC800 … #define chipModel_GC860 … #define chipModel_GC880 … #define chipModel_GC900 … #define chipModel_GC1000 … #define chipModel_GC1500 … #define chipModel_GC2000 … #define chipModel_GC2100 … #define chipModel_GC2200 … #define chipModel_GC2500 … #define chipModel_GC3000 … #define chipModel_GC4000 … #define chipModel_GC5000 … #define chipModel_GC5200 … #define chipModel_GC6400 … #define chipModel_GC7000 … #define chipModel_GC7400 … #define chipModel_GC8000 … #define chipModel_GC8100 … #define chipModel_GC8200 … #define chipModel_GC8400 … #define RGBA_BITS_R … #define RGBA_BITS_G … #define RGBA_BITS_B … #define RGBA_BITS_A … #define chipFeatures_FAST_CLEAR … #define chipFeatures_SPECIAL_ANTI_ALIASING … #define chipFeatures_PIPE_3D … #define chipFeatures_DXT_TEXTURE_COMPRESSION … #define chipFeatures_DEBUG_MODE … #define chipFeatures_Z_COMPRESSION … #define chipFeatures_YUV420_SCALER … #define chipFeatures_MSAA … #define chipFeatures_DC … #define chipFeatures_PIPE_2D … #define chipFeatures_ETC1_TEXTURE_COMPRESSION … #define chipFeatures_FAST_SCALER … #define chipFeatures_HIGH_DYNAMIC_RANGE … #define chipFeatures_YUV420_TILER … #define chipFeatures_MODULE_CG … #define chipFeatures_MIN_AREA … #define chipFeatures_NO_EARLY_Z … #define chipFeatures_NO_422_TEXTURE … #define chipFeatures_BUFFER_INTERLEAVING … #define chipFeatures_BYTE_WRITE_2D … #define chipFeatures_NO_SCALER … #define chipFeatures_YUY2_AVERAGING … #define chipFeatures_HALF_PE_CACHE … #define chipFeatures_HALF_TX_CACHE … #define chipFeatures_YUY2_RENDER_TARGET … #define chipFeatures_MEM32 … #define chipFeatures_PIPE_VG … #define chipFeatures_VGTS … #define chipFeatures_FE20 … #define chipFeatures_BYTE_WRITE_3D … #define chipFeatures_RS_YUV_TARGET … #define chipFeatures_32_BIT_INDICES … #define chipMinorFeatures0_FLIP_Y … #define chipMinorFeatures0_DUAL_RETURN_BUS … #define chipMinorFeatures0_ENDIANNESS_CONFIG … #define chipMinorFeatures0_TEXTURE_8K … #define chipMinorFeatures0_CORRECT_TEXTURE_CONVERTER … #define chipMinorFeatures0_SPECIAL_MSAA_LOD … #define chipMinorFeatures0_FAST_CLEAR_FLUSH … #define chipMinorFeatures0_2DPE20 … #define chipMinorFeatures0_CORRECT_AUTO_DISABLE … #define chipMinorFeatures0_RENDERTARGET_8K … #define chipMinorFeatures0_2BITPERTILE … #define chipMinorFeatures0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED … #define chipMinorFeatures0_SUPER_TILED … #define chipMinorFeatures0_VG_20 … #define chipMinorFeatures0_TS_EXTENDED_COMMANDS … #define chipMinorFeatures0_COMPRESSION_FIFO_FIXED … #define chipMinorFeatures0_HAS_SIGN_FLOOR_CEIL … #define chipMinorFeatures0_VG_FILTER … #define chipMinorFeatures0_VG_21 … #define chipMinorFeatures0_SHADER_HAS_W … #define chipMinorFeatures0_HAS_SQRT_TRIG … #define chipMinorFeatures0_MORE_MINOR_FEATURES … #define chipMinorFeatures0_MC20 … #define chipMinorFeatures0_MSAA_SIDEBAND … #define chipMinorFeatures0_BUG_FIXES0 … #define chipMinorFeatures0_VAA … #define chipMinorFeatures0_BYPASS_IN_MSAA … #define chipMinorFeatures0_HZ … #define chipMinorFeatures0_NEW_TEXTURE … #define chipMinorFeatures0_2D_A8_TARGET … #define chipMinorFeatures0_CORRECT_STENCIL … #define chipMinorFeatures0_ENHANCE_VR … #define chipMinorFeatures1_RSUV_SWIZZLE … #define chipMinorFeatures1_V2_COMPRESSION … #define chipMinorFeatures1_VG_DOUBLE_BUFFER … #define chipMinorFeatures1_EXTRA_EVENT_STATES … #define chipMinorFeatures1_NO_STRIPING_NEEDED … #define chipMinorFeatures1_TEXTURE_STRIDE … #define chipMinorFeatures1_BUG_FIXES3 … #define chipMinorFeatures1_AUTO_DISABLE … #define chipMinorFeatures1_AUTO_RESTART_TS … #define chipMinorFeatures1_DISABLE_PE_GATING … #define chipMinorFeatures1_L2_WINDOWING … #define chipMinorFeatures1_HALF_FLOAT … #define chipMinorFeatures1_PIXEL_DITHER … #define chipMinorFeatures1_TWO_STENCIL_REFERENCE … #define chipMinorFeatures1_EXTENDED_PIXEL_FORMAT … #define chipMinorFeatures1_CORRECT_MIN_MAX_DEPTH … #define chipMinorFeatures1_2D_DITHER … #define chipMinorFeatures1_BUG_FIXES5 … #define chipMinorFeatures1_NEW_2D … #define chipMinorFeatures1_NEW_FP … #define chipMinorFeatures1_TEXTURE_HALIGN … #define chipMinorFeatures1_NON_POWER_OF_TWO … #define chipMinorFeatures1_LINEAR_TEXTURE_SUPPORT … #define chipMinorFeatures1_HALTI0 … #define chipMinorFeatures1_CORRECT_OVERFLOW_VG … #define chipMinorFeatures1_NEGATIVE_LOG_FIX … #define chipMinorFeatures1_RESOLVE_OFFSET … #define chipMinorFeatures1_OK_TO_GATE_AXI_CLOCK … #define chipMinorFeatures1_MMU_VERSION … #define chipMinorFeatures1_WIDE_LINE … #define chipMinorFeatures1_BUG_FIXES6 … #define chipMinorFeatures1_FC_FLUSH_STALL … #define chipMinorFeatures2_LINE_LOOP … #define chipMinorFeatures2_LOGIC_OP … #define chipMinorFeatures2_SEAMLESS_CUBE_MAP … #define chipMinorFeatures2_SUPERTILED_TEXTURE … #define chipMinorFeatures2_LINEAR_PE … #define chipMinorFeatures2_RECT_PRIMITIVE … #define chipMinorFeatures2_COMPOSITION … #define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT … #define chipMinorFeatures2_PE_SWIZZLE … #define chipMinorFeatures2_END_EVENT … #define chipMinorFeatures2_S1S8 … #define chipMinorFeatures2_HALTI1 … #define chipMinorFeatures2_RGB888 … #define chipMinorFeatures2_TX__YUV_ASSEMBLER … #define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING … #define chipMinorFeatures2_TX_FILTER … #define chipMinorFeatures2_FULL_DIRECTFB … #define chipMinorFeatures2_2D_TILING … #define chipMinorFeatures2_THREAD_WALKER_IN_PS … #define chipMinorFeatures2_TILE_FILLER … #define chipMinorFeatures2_YUV_STANDARD … #define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT … #define chipMinorFeatures2_YUV_CONVERSION … #define chipMinorFeatures2_FLUSH_FIXED_2D … #define chipMinorFeatures2_INTERLEAVER … #define chipMinorFeatures2_MIXED_STREAMS … #define chipMinorFeatures2_2D_420_L2CACHE … #define chipMinorFeatures2_BUG_FIXES7 … #define chipMinorFeatures2_2D_NO_INDEX8_BRUSH … #define chipMinorFeatures2_TEXTURE_TILED_READ … #define chipMinorFeatures2_DECOMPRESS_Z16 … #define chipMinorFeatures2_BUG_FIXES8 … #define chipMinorFeatures3_ROTATION_STALL_FIX … #define chipMinorFeatures3_OCL_ONLY … #define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX … #define chipMinorFeatures3_INSTRUCTION_CACHE … #define chipMinorFeatures3_GEOMETRY_SHADER … #define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED … #define chipMinorFeatures3_GENERICS … #define chipMinorFeatures3_BUG_FIXES9 … #define chipMinorFeatures3_FAST_MSAA … #define chipMinorFeatures3_WCLIP … #define chipMinorFeatures3_BUG_FIXES10 … #define chipMinorFeatures3_UNIFIED_SAMPLERS … #define chipMinorFeatures3_BUG_FIXES11 … #define chipMinorFeatures3_PERFORMANCE_COUNTERS … #define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS … #define chipMinorFeatures3_BUG_FIXES12 … #define chipMinorFeatures3_BUG_FIXES13 … #define chipMinorFeatures3_DE_ENHANCEMENTS1 … #define chipMinorFeatures3_ACE … #define chipMinorFeatures3_TX_ENHANCEMENTS1 … #define chipMinorFeatures3_SH_ENHANCEMENTS1 … #define chipMinorFeatures3_SH_ENHANCEMENTS2 … #define chipMinorFeatures3_PE_ENHANCEMENTS1 … #define chipMinorFeatures3_2D_FC_SOURCE … #define chipMinorFeatures3_BUG_FIXES_14 … #define chipMinorFeatures3_POWER_OPTIMIZATIONS_0 … #define chipMinorFeatures3_NEW_HZ … #define chipMinorFeatures3_PE_DITHER_FIX … #define chipMinorFeatures3_DE_ENHANCEMENTS3 … #define chipMinorFeatures3_SH_ENHANCEMENTS3 … #define chipMinorFeatures3_SH_ENHANCEMENTS4 … #define chipMinorFeatures3_TX_ENHANCEMENTS2 … #define chipMinorFeatures4_FE_ENHANCEMENTS1 … #define chipMinorFeatures4_PE_ENHANCEMENTS2 … #define chipMinorFeatures4_FRUSTUM_CLIP_FIX … #define chipMinorFeatures4_DE_NO_GAMMA … #define chipMinorFeatures4_PA_ENHANCEMENTS_2 … #define chipMinorFeatures4_2D_GAMMA … #define chipMinorFeatures4_SINGLE_BUFFER … #define chipMinorFeatures4_HI_ENHANCEMENTS_1 … #define chipMinorFeatures4_TX_ENHANCEMENTS_3 … #define chipMinorFeatures4_SH_ENHANCEMENTS_5 … #define chipMinorFeatures4_FE_ENHANCEMENTS_2 … #define chipMinorFeatures4_TX_LERP_PRECISION_FIX … #define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION … #define chipMinorFeatures4_TEXTURE_ASTC … #define chipMinorFeatures4_PE_ENHANCEMENTS_4 … #define chipMinorFeatures4_MC_ENHANCEMENTS_1 … #define chipMinorFeatures4_HALTI2 … #define chipMinorFeatures4_2D_MIRROR_EXTENSION … #define chipMinorFeatures4_SMALL_MSAA … #define chipMinorFeatures4_BUG_FIXES_17 … #define chipMinorFeatures4_NEW_RA … #define chipMinorFeatures4_2D_OPF_YUV_OUTPUT … #define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2 … #define chipMinorFeatures4_NO_USER_CSC … #define chipMinorFeatures4_ZFIXES … #define chipMinorFeatures4_BUG_FIXES18 … #define chipMinorFeatures4_2D_COMPRESSION … #define chipMinorFeatures4_PROBE … #define chipMinorFeatures4_MEDIUM_PRECISION … #define chipMinorFeatures4_2D_SUPER_TILE_VERSION … #define chipMinorFeatures4_BUG_FIXES19 … #define chipMinorFeatures4_SH_ENHANCEMENTS6 … #define chipMinorFeatures5_SH_ENHANCEMENTS7 … #define chipMinorFeatures5_BUG_FIXES20 … #define chipMinorFeatures5_DE_ADDRESS_40 … #define chipMinorFeatures5_MINI_MMU_FIX … #define chipMinorFeatures5_EEZ … #define chipMinorFeatures5_BUG_FIXES21 … #define chipMinorFeatures5_EXTRA_VG_CAPS … #define chipMinorFeatures5_MULTI_SRC_V15 … #define chipMinorFeatures5_BUG_FIXES22 … #define chipMinorFeatures5_HALTI3 … #define chipMinorFeatures5_TESSELATION_SHADERS … #define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP … #define chipMinorFeatures5_MULTI_SRC_V2_STR_QUAD … #define chipMinorFeatures5_SEPARATE_SRC_DST … #define chipMinorFeatures5_HALTI4 … #define chipMinorFeatures5_RA_WRITE_DEPTH … #define chipMinorFeatures5_ANDROID_ONLY … #define chipMinorFeatures5_HAS_PRODUCTID … #define chipMinorFeatures5_TX_SUPPORT_DEC … #define chipMinorFeatures5_S8_MSAA_COMPRESSION … #define chipMinorFeatures5_PE_DITHER_FIX2 … #define chipMinorFeatures5_L2_CACHE_REMOVE … #define chipMinorFeatures5_FE_ALLOW_RND_VTX_CNT … #define chipMinorFeatures5_CUBE_MAP_FL28 … #define chipMinorFeatures5_TX_6BIT_FRAC … #define chipMinorFeatures5_FE_ALLOW_STALL_PREFETCH_ENG … #define chipMinorFeatures5_THIRD_PARTY_COMPRESSION … #define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT … #define chipMinorFeatures5_V2_MSAA_COMP_FIX … #define chipMinorFeatures5_HALTI5 … #define chipMinorFeatures5_EVIS … #define chipMinorFeatures5_BLT_ENGINE … #define chipMinorFeatures6_BUG_FIXES_23 … #define chipMinorFeatures6_BUG_FIXES_24 … #define chipMinorFeatures6_DEC … #define chipMinorFeatures6_VS_TILE_NV12 … #define chipMinorFeatures6_VS_TILE_NV12_10BIT … #define chipMinorFeatures6_RENDER_TARGET_8 … #define chipMinorFeatures6_TEX_LOD_FLOW_CORR … #define chipMinorFeatures6_FACE_LOD … #define chipMinorFeatures6_MULTI_CORE_SEMAPHORE_STALL_V2 … #define chipMinorFeatures6_VMSAA … #define chipMinorFeatures6_CHIP_ENABLE_LINK … #define chipMinorFeatures6_MULTI_SRC_BLT_1_5_ENHANCEMENT … #define chipMinorFeatures6_MULTI_SRC_BLT_BILINEAR_FILTER … #define chipMinorFeatures6_RA_HZEZ_CLOCK_CONTROL … #define chipMinorFeatures6_CACHE128B256BPERLINE … #define chipMinorFeatures6_V4_COMPRESSION … #define chipMinorFeatures6_PE2D_MAJOR_SUPER_TILE … #define chipMinorFeatures6_PE_32BPC_COLORMASK_FIX … #define chipMinorFeatures6_ALPHA_BLENDING_OPT … #define chipMinorFeatures6_NEW_GPIPE … #define chipMinorFeatures6_PIPELINE_32_ATTRIBUTES … #define chipMinorFeatures6_MSAA_SHADING … #define chipMinorFeatures6_NO_ANISTRO_FILTER … #define chipMinorFeatures6_NO_ASTC … #define chipMinorFeatures6_NO_DXT … #define chipMinorFeatures6_HWTFB … #define chipMinorFeatures6_RA_DEPTH_WRITE_MSAA1X_FIX … #define chipMinorFeatures6_EZHZ_CLOCKGATE_FIX … #define chipMinorFeatures6_SH_SNAP2PAGE_FIX … #define chipMinorFeatures6_SH_HALFDEPENDENCY_FIX … #define chipMinorFeatures6_USC_MCFILL_FIX … #define chipMinorFeatures6_TPG_TCPERF_FIX … #define chipMinorFeatures7_USC_MDFIFO_OVERFLOW_FIX … #define chipMinorFeatures7_SH_TEXLD_BARRIER_IN_CS_FIX … #define chipMinorFeatures7_RS_NEW_BASEADDR … #define chipMinorFeatures7_PE_8BPP_DUALPIPE_FIX … #define chipMinorFeatures7_SH_ADVANCED_INSTR … #define chipMinorFeatures7_SH_FLAT_INTERPOLATION_DUAL16_FIX … #define chipMinorFeatures7_USC_CONTINUOUS_FLUS_FIX … #define chipMinorFeatures7_SH_SUPPORT_V4 … #define chipMinorFeatures7_SH_SUPPORT_ALPHA_KILL … #define chipMinorFeatures7_PE_NO_ALPHA_TEST … #define chipMinorFeatures7_TX_LOD_NEAREST_SELECT … #define chipMinorFeatures7_SH_FIX_LDEXP … #define chipMinorFeatures7_SUPPORT_MOVAI … #define chipMinorFeatures7_SH_SNAP2PAGE_MAXPAGES_FIX … #define chipMinorFeatures7_PE_RGBA16I_FIX … #define chipMinorFeatures7_BLT_8bpp_256TILE_FC_FIX … #define chipMinorFeatures7_PE_64BIT_FENCE_FIX … #define chipMinorFeatures7_USC_FULL_CACHE_FIX … #define chipMinorFeatures7_TX_YUV_ASSEMBLER_10BIT … #define chipMinorFeatures7_FE_32BIT_INDEX_FIX … #define chipMinorFeatures7_BLT_64BPP_MASKED_CLEAR_FIX … #define chipMinorFeatures7_BIT_SECURITY … #define chipMinorFeatures7_BIT_ROBUSTNESS … #define chipMinorFeatures7_USC_ATOMIC_FIX … #define chipMinorFeatures7_SH_PSO_MSAA1x_FIX … #define chipMinorFeatures7_BIT_USC_VX_PERF_FIX … #define chipMinorFeatures7_EVIS_NO_ABSDIFF … #define chipMinorFeatures7_EVIS_NO_BITREPLACE … #define chipMinorFeatures7_EVIS_NO_BOXFILTER … #define chipMinorFeatures7_EVIS_NO_CORDIAC … #define chipMinorFeatures7_EVIS_NO_DP32 … #define chipMinorFeatures7_EVIS_NO_FILTER … #define chipMinorFeatures8_EVIS_NO_IADD … #define chipMinorFeatures8_EVIS_NO_SELECTADD … #define chipMinorFeatures8_EVIS_LERP_7OUTPUT … #define chipMinorFeatures8_EVIS_ACCSQ_8OUTPUT … #define chipMinorFeatures8_USC_GOS_ADDR_FIX … #define chipMinorFeatures8_TX_8BIT_UVFRAC … #define chipMinorFeatures8_TX_DESC_CACHE_CLOCKGATE_FIX … #define chipMinorFeatures8_RSBLT_MSAA_DECOMPRESSION … #define chipMinorFeatures8_TX_INTEGER_COORDINATE … #define chipMinorFeatures8_DRAWID … #define chipMinorFeatures8_PSIO_SAMPLEMASK_IN_R0ZW_FIX … #define chipMinorFeatures8_TX_INTEGER_COORDINATE_V2 … #define chipMinorFeatures8_MULTI_CORE_BLOCK_SET_CONFIG … #define chipMinorFeatures8_VG_RESOLVE_ENGINE … #define chipMinorFeatures8_VG_PE_COLOR_KEY … #define chipMinorFeatures8_VG_IM_INDEX_FORMAT … #define chipMinorFeatures8_SNAPPAGE_CMD … #define chipMinorFeatures8_SH_NO_INDEX_CONST_ON_A0 … #define chipMinorFeatures8_SH_NO_ONECONST_LIMIT … #define chipMinorFeatures8_SH_IMG_LDST_ON_TEMP … #define chipMinorFeatures8_COMPUTE_ONLY … #define chipMinorFeatures8_SH_IMG_LDST_CLAMP … #define chipMinorFeatures8_SH_ICACHE_ALLOC_COUNT_FIX … #define chipMinorFeatures8_SH_ICACHE_PREFETCH … #define chipMinorFeatures8_PE2D_SEPARATE_CACHE … #define chipMinorFeatures8_VG_AYUV_INPUT_OUTPUT … #define chipMinorFeatures8_VG_DOUBLE_IMAGE … #define chipMinorFeatures8_VG_RECTANGLE_STRIPE_MODE … #define chipMinorFeatures8_VG_MMU … #define chipMinorFeatures8_VG_IM_FILTER … #define chipMinorFeatures8_VG_IM_YUV_PACKET … #define chipMinorFeatures8_VG_IM_YUV_PLANAR … #define chipMinorFeatures9_VG_PE_YUV_PACKET … #define chipMinorFeatures9_VG_COLOR_PRECISION_8_BIT … #define chipMinorFeatures9_PE_MSAA_OQ_FIX … #define chipMinorFeatures9_PSIO_MSAA_CL_FIX … #define chipMinorFeatures9_USC_DEFER_FILL_FIX … #define chipMinorFeatures9_SH_CLOCK_GATE_FIX … #define chipMinorFeatures9_FE_NEED_DUMMYDRAW … #define chipMinorFeatures9_PE2D_LINEAR_YUV420_OUTPUT … #define chipMinorFeatures9_PE2D_LINEAR_YUV420_10BIT … #define chipMinorFeatures9_MULTI_CLUSTER … #define chipMinorFeatures9_VG_TS_CULLING … #define chipMinorFeatures9_VG_FP25 … #define chipMinorFeatures9_SH_MULTI_WG_PACK … #define chipMinorFeatures9_SH_DUAL16_SAMPLEMASK_ZW … #define chipMinorFeatures9_TPG_TRIVIAL_MODE_FIX … #define chipMinorFeatures9_TX_ASTC_MULTISLICE_FIX … #define chipMinorFeatures9_FE_ROBUST_FIX … #define chipMinorFeatures9_SH_GPIPE_ACCESS_FULLTEMPS … #define chipMinorFeatures9_PSIO_INTERLOCK … #define chipMinorFeatures9_PA_WIDELINE_FIX … #define chipMinorFeatures9_WIDELINE_HELPER_FIX … #define chipMinorFeatures9_G2D_3RD_PARTY_COMPRESSION_1_1 … #define chipMinorFeatures9_TX_FLUSH_L1CACHE … #define chipMinorFeatures9_PE_DITHER_FIX2 … #define chipMinorFeatures9_G2D_DEC400 … #define chipMinorFeatures9_SH_TEXLD_U_FIX … #define chipMinorFeatures9_MC_FCCACHE_BYTEMASK … #define chipMinorFeatures9_SH_MULTI_WG_PACK_FIX … #define chipMinorFeatures9_DC_OVERLAY_SCALING … #define chipMinorFeatures9_DC_SOURCE_ROTATION … #define chipMinorFeatures9_DC_TILED … #define chipMinorFeatures9_DC_YUV_L1 … #define chipMinorFeatures10_DC_D30_OUTPUT … #define chipMinorFeatures10_DC_MMU … #define chipMinorFeatures10_DC_COMPRESSION … #define chipMinorFeatures10_DC_QOS … #define chipMinorFeatures10_PE_ADVANCE_BLEND_PART0 … #define chipMinorFeatures10_FE_PATCHLIST_FETCH_FIX … #define chipMinorFeatures10_RA_CG_FIX … #define chipMinorFeatures10_EVIS_VX2 … #define chipMinorFeatures10_NN_FLOAT … #define chipMinorFeatures10_DEC400 … #define chipMinorFeatures10_LS_SUPPORT_PERCOMP_DEPENDENCY … #define chipMinorFeatures10_TP_ENGINE … #define chipMinorFeatures10_MULTI_CORE_BLOCK_SET_CONFIG2 … #define chipMinorFeatures10_PE_VMSAA_COVERAGE_CACHE_FIX … #define chipMinorFeatures10_SECURITY_AHB … #define chipMinorFeatures10_MULTICORE_SEMAPHORESTALL_V3 … #define chipMinorFeatures10_SMALLBATCH … #define chipMinorFeatures10_SH_CMPLX … #define chipMinorFeatures10_SH_IDIV0_SWZL_EHS … #define chipMinorFeatures10_TX_LERP_LESS_BIT … #define chipMinorFeatures10_SH_GM_ENDIAN … #define chipMinorFeatures10_SH_GM_USC_UNALLOC … #define chipMinorFeatures10_SH_END_OF_BB … #define chipMinorFeatures10_VIP_V7 … #define chipMinorFeatures10_TX_BORDER_CLAMP_FIX … #define chipMinorFeatures10_SH_IMG_LD_LASTPIXEL_FIX … #define chipMinorFeatures10_ASYNC_BLT … #define chipMinorFeatures10_ASYNC_FE_FENCE_FIX … #define chipMinorFeatures10_PSCS_THROTTLE … #define chipMinorFeatures10_SEPARATE_LS … #define chipMinorFeatures10_MCFE … #define chipMinorFeatures10_WIDELINE_TRIANGLE_EMU … #define chipMinorFeatures11_VG_RESOLUTION_8K … #define chipMinorFeatures11_FENCE_32BIT … #define chipMinorFeatures11_FENCE_64BIT … #define chipMinorFeatures11_NN_INTERLEVE8 … #define chipMinorFeatures11_TP_REORDER … #define chipMinorFeatures11_PE_DEPTH_ONLY_OQFIX … #define chipMinorFeatures12_G2D_DEC400EX … #endif /* COMMON_XML */
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